Differential Signaling

Differential signaling transmits information as the voltage difference between two complementary conductors rather than as the voltage of a single conductor referenced to ground. The transmitter drives the two lines with equal and opposite swings, and the receiver responds only to the difference between them. This simple change in reference frame yields large gains in noise immunity, electromagnetic compatibility, and achievable data rate, which is why nearly every modern high-speed link, from USB and PCI Express to HDMI and gigabit Ethernet, is differential.

The central benefit is common-mode rejection. Noise that couples onto both conductors equally, whether from a nearby aggressor, a ground shift, or external interference, appears as a common-mode disturbance that the receiver subtracts away, while the wanted differential signal survives. A tightly coupled pair also confines its return current to its partner conductor, so it radiates little and is correspondingly less susceptible to outside fields. Realizing these advantages, however, depends on preserving symmetry along the entire path: the two lines must be matched in impedance, length, and coupling so that the balance assumed by the receiver actually holds. This category examines how differential pairs are designed, routed, standardized, and analyzed when that balance is imperfect.

Subcategories

Differential Pair Design - choosing differential impedance, conductor geometry, and coupling so the pair presents a controlled, matched load.
Differential Routing Techniques - length matching, intra-pair skew control, symmetric breakouts, and via handling that keep the two lines balanced.
Differential Standards - electrical conventions such as LVDS, CML, and PECL, and the link standards built on them.
Mode Conversion - how asymmetry turns differential energy into common-mode noise, and how it is measured and contained.

Why Differential Signaling Wins at High Speed

Single-ended signaling measures every voltage against a shared ground that is never truly quiet. As edge rates sharpen and many drivers switch at once, the reference itself bounces, and that ground noise is indistinguishable from signal. Differential signaling sidesteps the problem by carrying its own reference: the receiver looks only at the difference between the two lines, so a shift common to both cancels. Several practical advantages follow from this property.

Common-mode noise rejection. Interference, ground bounce, and supply noise that couple equally to both conductors are removed at the receiver, leaving more margin for the wanted signal.
Lower emissions. Equal and opposite currents in a closely spaced pair produce magnetic fields that largely cancel in the far field, so a balanced differential link radiates far less than a single-ended line carrying the same data.
Smaller swings. Because the useful signal is the difference of two lines, a modest swing yields twice the effective amplitude. Standards such as LVDS deliver a robust link with only a few hundred millivolts of swing, which cuts power and shortens transition times.
Defined return path. Each line acts as the return for its partner, tightening field confinement and reducing dependence on a pristine ground plane.

These benefits are not automatic. They hold to the extent that the pair is balanced, which makes impedance control, length matching, and symmetric routing the recurring themes of differential design.

Differential and Common Modes

Any pair of conductors can be described by two superimposed modes, and separating them is the key to reasoning about differential links.

Differential Mode

In the differential mode the two lines carry equal and opposite voltages, and the signal of interest is their difference. The relevant load is the differential impedance, the impedance seen between the two conductors. Because the lines are electromagnetically coupled, this differential impedance is not simply twice the impedance of one line to ground; tighter coupling lowers it. Common targets reflect the standards a pair must serve: 100 Ω for LVDS, HDMI, and 1000BASE-T, 90 Ω for USB, and 85 Ω for PCI Express from the second generation onward. Terminating the pair in its differential impedance absorbs the signal and suppresses reflections.

Common Mode

In the common mode both lines move together, in the same direction, relative to ground. A differential receiver ideally ignores this mode, but it cannot be neglected in design. Common-mode current flows through the ground and chassis rather than staying within the pair, so it is the principal source of radiated emission and a frequent cause of failed compliance tests. Real receivers also tolerate only a limited common-mode voltage range, which is why standards specify a common-mode level, for example the nominal 1.2 V offset of LVDS, that keeps both inputs within the receiver's operating window.

Balance and Its Imperfections

The entire case for differential signaling rests on balance: matched impedance, matched electrical length, and matched coupling on the two lines. Where that symmetry breaks, the modes no longer stay separate, and differential energy leaks into the common mode, a process called mode conversion. The usual culprits are familiar layout realities.

Length mismatch and skew. If one line is electrically longer than the other, the two edges arrive at different times. This intra-pair skew distorts the differential edge and injects a common-mode pulse at every transition. Serpentine length-tuning corrects the difference, ideally close to where it originates.
Impedance discontinuities. Vias, connectors, breakout fan-outs near a package, and gaps in the reference plane disturb the controlled differential impedance and create reflections that close the eye.
Asymmetric coupling. A bend, an adjacent aggressor, or a plane split that affects one line more than the other unbalances the pair and converts differential energy to common mode.

These effects are quantified with mixed-mode S-parameters, which resolve a four-port pair measurement into differential-to-differential transmission and the differential-to-common terms that expose conversion. Keeping those conversion terms small is the practical measure of a well-balanced design.

Common Electrical Standards

Differential links are built on a handful of driver and receiver conventions, each trading swing, speed, and power. Low-voltage differential signaling (LVDS), standardized as ANSI/TIA/EIA-644, drives a roughly 350 mV swing about a 1.2 V common-mode level into a 100 Ω termination, using a low-current source that keeps power modest and emissions low; it serves display interfaces and moderate-rate data paths. Current-mode logic (CML) drives the line directly with on-chip termination and supports the multi-gigabit rates used by SerDes, PCI Express, and HDMI. Older positive-emitter-coupled logic (PECL) and its low-voltage form (LVPECL) offer fast edges and low jitter for clock distribution at higher power. The standards topic in this category surveys these conventions and the link specifications layered on top of them.

Applications

Differential signaling is the default wherever speed, distance, or a noisy environment would defeat a single-ended line. Consumer and computing interconnects such as USB, PCI Express, SATA, HDMI, and DisplayPort are all differential, as are Ethernet over twisted pair and the SerDes lanes that link chips across a backplane. Display panels carry pixel data over LVDS and its successors. In industrial and automotive systems, balanced pairs such as the RS-485 bus and the CAN bus exploit common-mode rejection to communicate reliably over long, electrically hostile runs. In every case the same discipline applies: a controlled-impedance, length-matched, symmetric pair is what turns the theoretical advantages of differential signaling into a dependable link.

About This Category

The topics gathered here develop differential signaling from layout to measurement. Differential pair design sets the impedance and geometry; differential routing techniques preserve balance across the board; differential standards define the electrical and protocol conventions; and mode conversion explains what happens, and how to respond, when balance is imperfect. Together they provide the foundation for designing the high-speed differential links at the heart of modern electronic systems.