Electronics Guide

Articles in This Category

Why Differential Signaling Wins at High Speed

Single-ended signaling measures every voltage against a shared ground that is never truly quiet. As edge rates sharpen and many drivers switch at once, the reference itself bounces, and that ground noise is indistinguishable from signal. Differential signaling sidesteps the problem by carrying its own reference: the receiver looks only at the difference between the two lines, so a shift common to both cancels. Several practical advantages follow from this property.

• Common-mode noise rejection. Interference, ground bounce, and supply noise that couple equally to both conductors are removed at the receiver, leaving more margin for the wanted signal.
• Lower emissions. Equal and opposite currents in a closely spaced pair produce magnetic fields that largely cancel in the far field, so a balanced differential link radiates far less than a single-ended line carrying the same data.
• Smaller swings. Because the useful signal is the difference of two lines driven in opposition, the receiver sees twice the amplitude that either line alone provides. Standards such as LVDS therefore deliver a robust link with only a few hundred millivolts on each conductor, which cuts power and shortens transition times.
• Defined return path. Each line acts as the return for its partner, tightening field confinement and reducing dependence on a pristine ground plane.

These benefits are not automatic. They hold to the extent that the pair is balanced, which makes impedance control, length matching, and symmetric routing the recurring themes of differential design.

Differential and Common Modes

Any pair of conductors can be described by two superimposed modes, and separating them is the key to reasoning about differential links.

Differential Mode

In the differential mode the two lines carry equal and opposite voltages, and the signal of interest is their difference. The relevant load is the differential impedance, the impedance seen between the two conductors. It equals twice the odd-mode impedance of a single line, and because the lines are electromagnetically coupled, that odd-mode impedance falls below the impedance the line would show in isolation. Differential impedance is therefore not simply twice the single-ended impedance: tighter coupling lowers it, and the gap widens as the two conductors are brought closer together.

Common targets reflect the standards a pair must serve: 100 Ω for LVDS, HDMI, and 1000BASE-T; 90 Ω ±15 percent for USB; and 85 Ω ±15 percent for PCI Express from the second generation onward, revised down from the 100 Ω of the first generation. Terminating the pair in its differential impedance absorbs the arriving energy and suppresses reflections. A mismatched or unterminated pair returns part of each edge toward the driver, and the resulting ringing and intersymbol interference close the eye.

Common Mode

In the common mode both lines move together, in the same direction, relative to ground. A differential receiver ideally ignores this mode, but it cannot be neglected in design. Common-mode current flows through the ground and chassis rather than staying within the pair, so its return loop is large, it radiates efficiently, and it is a frequent cause of failed emissions testing. Attached cables make this worse, because a cable driven by even a small common-mode voltage behaves as an antenna at frequencies where its length approaches a quarter wavelength.

Real receivers also tolerate only a limited common-mode voltage range, which is why standards specify a common-mode level that keeps both inputs inside the receiver's operating window. LVDS centers its signal on a nominal 1.2 V offset. Robust industrial interfaces widen the window instead: RS-485 receivers must operate correctly with the bus between −7 V and +12 V relative to local ground, which is what allows a long run to tolerate the ground potential differences between distant equipment. Where common-mode energy must be suppressed rather than merely tolerated, a common-mode choke presents high impedance to the common mode while passing the differential signal almost unaffected.

Balance and Its Imperfections

The entire case for differential signaling rests on balance: matched impedance, matched electrical length, and matched coupling on the two lines. Where that symmetry breaks, the modes no longer stay separate, and differential energy leaks into the common mode, a process called mode conversion. The usual culprits are familiar layout realities.

• Length mismatch and skew. If one line is electrically longer than the other, the two edges arrive at different times. This intra-pair skew distorts the differential edge and injects a common-mode pulse at every transition. Serpentine length-tuning corrects the difference, and it works best applied close to where the mismatch originates, so that the pair travels most of the channel already matched.
• Impedance discontinuities. Vias, connectors, breakout fan-outs near a package, and gaps in the reference plane disturb the controlled differential impedance and create reflections. The unused barrel below a signal via, the via stub, is a particularly common offender, because it acts as a resonant stub whose quarter-wave notch can land inside the signal band. Back-drilling removes it.
• Asymmetric coupling. A bend, an adjacent aggressor, or a plane split that affects one line more than the other unbalances the pair and converts differential energy to common mode.
• Fiber-weave effect. Woven glass reinforcement makes laminate dielectrically inhomogeneous at the scale of a trace. If one line of a pair runs largely over glass bundles and its partner over resin, the two see different effective permittivities and accumulate skew over distance. Routing pairs at a small angle to the weave, or specifying a more uniform spread-glass style, averages the difference out.

These effects are quantified with mixed-mode S-parameters, which recast a four-port measurement of the pair into differential, common, and cross-mode blocks. The differential insertion and return loss terms, conventionally written SDD21 and SDD11, describe the wanted path, while the mode-conversion terms SCD21 and SCD11 expose how much differential energy the structure turns into common mode. Keeping those conversion terms far below the differential response is the practical measure of a well-balanced design, and it is usually the quickest way to localize the offending discontinuity.

Common Electrical Standards

Differential links are built on a handful of driver and receiver conventions, each trading swing, speed, and power against one another.

• LVDS. Low-voltage differential signaling, standardized as ANSI/TIA/EIA-644-A, switches a current source of roughly 3.5 mA through the pair into a 100 Ω termination, producing a nominal 350 mV swing about a 1.2 V common-mode level. The constant current draw keeps power modest and supply noise low, and the small swing limits emissions. LVDS serves display interfaces, camera and sensor links, and moderate-rate data paths.
• CML. Current-mode logic steers a tail current between two on-chip 50 Ω loads returned to the supply, giving the driver its own source termination and a single-ended swing of a few hundred millivolts. Because the termination is integrated and the topology is simple, CML scales to the multi-gigabit rates used by SerDes lanes, PCI Express, and SATA. Links of this kind are commonly AC-coupled with series capacitors so that transmitter and receiver may sit at different common-mode levels. HDMI's TMDS uses a closely related current-steering driver terminated to the supply rail.
• PECL and LVPECL. Positive emitter-coupled logic is emitter-coupled logic referenced to a positive supply rather than the negative rail of classic ECL, and LVPECL is its low-voltage form. The larger swing, on the order of 800 mV per conductor, and the very fast edges that emitter-coupled stages produce give excellent jitter performance, which is why LVPECL persists in clock distribution despite drawing considerably more power than LVDS or CML.

Because these conventions differ in swing, common-mode level, and termination, connecting one to another generally requires a translation network of attenuating and biasing resistors, or AC coupling, rather than a direct connection. The standards topic in this category surveys these electrical conventions and the link specifications layered on top of them.

Costs and Trade-offs

Differential signaling is not free, and understanding what it costs explains why single-ended signaling has not disappeared.

• Twice the conductors. Every differential signal consumes two pins, two package balls, two connector contacts, and two board traces. On a wide interface that doubling dominates package cost and board area, which is one reason parallel memory buses such as DDR keep their data lines single-ended and spend the saved pins on width instead.
• Routing discipline. The advantages hold only while the pair stays balanced, so differential routing carries constraints that single-ended nets do not: matched intra-pair length, symmetric breakouts and via transitions, uniform spacing through bends, and an unbroken reference plane. Meeting them consumes designer effort and constrains the layout.
• Static termination power. Current-mode drivers such as LVDS and CML source current continuously rather than only during transitions, so a link burns power whether or not data are changing. At low speeds a CMOS single-ended driver, which dissipates roughly in proportion to switching activity, is the more efficient choice.
• Measurement complexity. Characterizing a pair means four-port instead of two-port measurement, mixed-mode conversion of the results, and probing that does not itself unbalance the structure. Differential probes and matched cable pairs cost more than their single-ended equivalents.

The trade is decisively worthwhile once edge rates sharpen, once a link must cross a connector or cable, or once the environment is electrically hostile. Below those thresholds, a well-referenced single-ended net remains the simpler and cheaper answer.

Applications

Differential signaling is the default wherever speed, distance, or a noisy environment would defeat a single-ended line. Consumer and computing interconnects such as USB, PCI Express, SATA, HDMI, and DisplayPort are all differential, as are Ethernet over twisted pair and the SerDes lanes that carry traffic across a backplane. Display panels receive pixel data over LVDS and its successors, and image sensors return it over similar low-swing pairs.

Industrial and automotive systems exploit the same property over far longer and dirtier runs. RS-485, standardized as TIA/EIA-485-A, drives a twisted pair of roughly 120 Ω characteristic impedance terminated at both ends, and its wide receiver common-mode range supports multidrop links reaching about 1,200 meters at modest data rates, which is why it underpins field protocols such as Modbus and PROFIBUS. High-speed CAN, defined in ISO 11898-2, uses a similarly terminated 120 Ω pair and reaches 1 Mbps in its classical form, carrying vehicle network traffic through an environment saturated with ignition and switching noise.

In every case the same discipline applies: a controlled-impedance, length-matched, symmetric pair is what turns the theoretical advantages of differential signaling into a dependable link.

About This Category

The topics gathered here develop differential signaling from layout to measurement. Differential pair design sets the impedance and geometry; differential routing techniques preserve balance across the board; differential standards define the electrical and protocol conventions; and mode conversion explains what happens, and how to respond, when balance is imperfect. Together they provide the foundation for designing the high-speed differential links at the heart of modern electronic systems.

Related Topics