Impedance Matching
Impedance matching is the practice of arranging the impedances along a signal path so that energy travels from source to load with minimal reflection. On a transmission line, a wave launched by the driver encounters the line's characteristic impedance and continues undisturbed only as long as that impedance remains constant. Wherever the impedance changes—at the far-end load, at the driver, at a connector, or at a via—part of the wave reflects back toward its origin. Matching eliminates or controls those reflections by making the terminating impedance equal the line impedance, or by interposing a network that transforms one impedance into another.
The subject sits at the intersection of high-speed digital design and radio-frequency engineering. In a digital channel, a mismatch produces overshoot, ringing, and intersymbol interference that close the eye and erode timing margin. In a radio-frequency system, a mismatch reflects power that never reaches the antenna or amplifier and can destabilize the source. The same underlying physics governs both: the reflection coefficient set by the ratio of impedances. This article develops the reflection coefficient, surveys the common termination schemes, distinguishes source from load termination, and explains when matching is worth its cost.
Characteristic Impedance and the Goal of Matching
A transmission line presents a characteristic impedance, written Z0, that relates the voltage and current of a wave traveling in one direction along it. For a low-loss line this value is set by the per-unit-length inductance and capacitance, Z0 = √(L / C), and it depends only on the line's geometry and surrounding dielectric, not on its length. A launched edge sees Z0 as a real resistance for the entire time before any reflection returns, which is why a driver feeding a 50-ohm line initially behaves as though it were loaded by a 50-ohm resistor regardless of what sits at the far end.
Matching means presenting an impedance equal to Z0 at the point where a reflection would otherwise form. When the impedance seen by the wave never changes, no energy turns back, and the entire incident wave is delivered to the load. The goal is rarely to maximize raw power transfer—that is a separate criterion—but to suppress the reflections that distort a digital waveform or waste transmitted power. Because real interconnects contain connectors, vias, and package transitions that each perturb the impedance, perfect matching is an ideal that design approaches rather than reaches; the practical aim is to keep residual reflections within the receiver's margin.
The Reflection Coefficient
The fraction of a wave that reflects from an impedance discontinuity is the reflection coefficient. At a load of impedance ZL terminating a line of impedance Z0, it is:
Γ = (ZL − Z0) / (ZL + Z0)
The coefficient ranges from −1 to +1 for passive loads. When ZL equals Z0, the numerator vanishes and Γ is zero: the load is matched and nothing reflects. An open circuit gives Γ = +1, reflecting the full wave in phase and doubling the voltage at the open end; a short circuit gives Γ = −1, reflecting an inverted wave that drives the voltage there to zero. A load that is twice the line impedance reflects one-third of the wave, while a load at half the line impedance reflects one-third inverted. Reflections occur at the source as well as the load, governed by the same expression with the source impedance in place of ZL, and a wave can bounce repeatedly between two mismatched ends.
Two related figures express the same information. The voltage standing wave ratio, common in radio-frequency work, is (1 + |Γ|) / (1 − |Γ|); a perfect match gives a ratio of 1, and larger values signal worse mismatch. The return loss, expressed in decibels as −20 log10|Γ|, states how far below the incident wave the reflected wave falls, so a larger return loss is better. These metrics let designers specify and measure matching quality, often with a time-domain reflectometer that maps reflections to their physical locations along the line.
Series, Parallel, and AC Termination
Termination resistors are the everyday tools of impedance matching in digital systems, and they fall into a few canonical arrangements. Series termination, also called source-series termination, places a resistor in series with the driver close to its output. The resistor is chosen so that the driver's own output resistance plus the series resistor sums to the line impedance. The driver launches a half-amplitude wave into the matched source; the wave doubles at the unterminated, high-impedance receiver to reach full amplitude, and the reflection that returns to the source is absorbed there because the source is now matched. Series termination dissipates no static power, which suits point-to-point nets driven from a single source, but the half-amplitude step exists along the line until the far-end reflection arrives, so it favors topologies with one receiver at the end rather than several distributed along the line.
Parallel termination places a resistor equal to Z0 from the line to a reference at the far end, absorbing the incident wave directly at the load so that no reflection ever forms. It delivers a clean full-amplitude signal and tolerates multiple loads, but it draws continuous current whenever the line is held at a logic level, raising power consumption and loading the driver. AC termination, or RC termination, addresses that static dissipation by placing a capacitor in series with the terminating resistor. The capacitor blocks direct current, so no power is wasted holding a static level, while passing the high-frequency edges to the resistor that damps reflections. The capacitor must be large enough to look like a low impedance across the edge yet small enough to avoid excessive transient current, a trade-off that constrains AC termination to a band of edge rates.
Source Termination Versus Load Termination
Whether to terminate at the source or at the load is a design decision shaped by topology, power, and signal levels. Source termination consumes no static power and is therefore attractive for low-power and battery-operated designs, but it relies on a single driver and a single far-end receiver, because the half-amplitude wave traveling outbound would be misread by any receiver tapped along the middle of the line before the far-end reflection completes the swing. It also depends on the driver's output impedance being predictable, which is why many output stages include controlled or calibrated drive strength.
Load termination, by contrast, presents a clean full-amplitude waveform at every point on the line from the first instant, so it serves multidrop and multireceiver buses well, at the cost of continuous current and added driver loading. Many high-speed systems combine both, terminating the source to absorb residual reflections while terminating the load to suppress the primary one, a doubly terminated line that trades efficiency for the lowest reflection and the most forgiving timing. The choice is rarely abstract: it follows from how many receivers share the net, how much power the rail can spare, and how much voltage swing the receiver requires.
Thevenin and Differential Termination
Thevenin termination, also called split termination, implements parallel termination with two resistors instead of one: one resistor ties the line to the supply and the other ties it to ground. The parallel combination of the two equals the line impedance, satisfying the match, while their divider ratio sets the bias voltage the line settles to when undriven. This arrangement lets a single termination supply a defined idle level—useful when the receiver expects the bus to rest at a particular voltage—and it can reference the termination to the full supply rather than a separate termination rail. Its drawback is that current flows through the resistor pair continuously, and the two resistors together can draw more power than a single parallel resistor returned to a dedicated mid-rail termination voltage.
Differential termination matches a complementary pair rather than a single-ended line. The simplest form places one resistor equal to the differential impedance directly across the two conductors at the receiver, absorbing the differential wave. A refinement splits that resistor into two halves in series and connects their midpoint to a capacitor returned to ground, which terminates the common-mode component as well as the differential component without dissipating static power in the common-mode path. Because differential signaling relies on the tight coupling and balance of the pair, the termination must be symmetric and placed close to the receiver so that the stub beyond it does not reintroduce reflections. Differential termination underpins the high-speed standards—LVDS, PCI Express, USB, and Ethernet among them—that carry data as balanced pairs.
On-Die Termination and Calibration
As data rates climbed, the short stub between a package pin and an external termination resistor became a meaningful discontinuity in its own right, and the resistor was moved onto the silicon. On-die termination integrates the terminating resistance inside the receiver or transceiver, eliminating the package and board parasitics that an external resistor would add and removing components from an already crowded board. The resistance is realized with transistors operating in their linear region or with switched resistor arrays, and because the absolute resistance of an on-chip device varies with process, voltage, and temperature, on-die termination is almost always calibrated. A calibration engine compares the on-die resistance against a single precise external reference resistor and trims the array until the two agree, holding the termination near its target across operating conditions.
On-die termination also enables dynamic behavior that discrete resistors cannot match. A memory interface, for example, can switch termination on only while a particular device is being read or written and disable it otherwise, reducing power and tailoring the termination to the direction of traffic. The same integration allows the termination value itself to be programmed to different settings for different bus configurations. This flexibility, combined with the parasitic reduction, has made on-die termination standard in DDR memory, SerDes links, and most multi-gigabit interfaces, where an external resistor simply could not be placed close enough to the receiver to be effective.
Matching Networks for Radio Frequency
When a source and load have unequal impedances that cannot simply be made equal—an antenna whose impedance is fixed by its physics, or an amplifier with a particular optimum load—a matching network transforms one impedance into the other across a band of frequencies. Unlike a terminating resistor, which absorbs energy, a matching network is built from reactive components, inductors and capacitors, that store and exchange energy without dissipating it, so it transforms impedance with low loss. The simplest is the L-network, two reactive elements that move an impedance to a desired value at a single design frequency. Adding a third element forms a pi-network or a T-network, which gives the designer independent control over the loaded quality factor and hence the bandwidth of the match.
Designers commonly reason about these transformations on the Smith chart, a graphical map of the reflection coefficient on which adding a series or shunt reactance traces a predictable arc, letting a network be synthesized by following arcs from the load impedance to the center, where the match is perfect. At higher frequencies the reactive elements may be replaced by transmission-line sections—quarter-wave transformers and stubs—that achieve the same transformation through the line's own impedance-transforming property. A matching network is inherently narrowband to some degree, because the reactances that produce a perfect match at one frequency drift away from it at others, and widening the matched band generally requires more sections and accepts a less perfect match at the center.
When Impedance Matching Matters
Matching is not always necessary, and applying it where it is not needed wastes power and components. The deciding factor is whether the interconnect behaves as a transmission line, which it does once its one-way propagation delay is an appreciable fraction of the signal's rise time. A short trace carrying a slow edge settles long before reflections can matter, and a terminating resistor on it would only burn power. As edges sharpen or lines lengthen, the round-trip delay grows comparable to the rise time, reflections persist into the bit period, and termination becomes essential to keep overshoot, ringing, and intersymbol interference within the receiver's budget.
The cost of mismatch differs by domain. In digital signaling the penalty is distortion and lost timing margin, so the threshold for adding termination is set by the noise and timing budget of the link. In radio-frequency and power applications the penalty is reflected power: a mismatched antenna radiates less and can reflect energy that destabilizes or damages the source, making a good match a requirement rather than an optimization. Across both, the engineering task is to identify which nets and interfaces are sensitive, choose a termination or matching scheme suited to the topology and power constraints, and verify with simulation and measurement that the residual reflections stay safely below the level that would compromise the system.
Summary
Impedance matching arranges the impedances along a signal path so that a wave travels from source to load without harmful reflection. The reflection coefficient, set by the ratio of the load impedance to the line's characteristic impedance, quantifies how much of a wave turns back at any discontinuity and is zero only when the two are equal. Digital systems realize matching with termination resistors—series at the source, parallel, AC, Thevenin, and differential at the load—chosen according to topology, power budget, and required signal swing, and increasingly with calibrated on-die termination that removes the parasitics of an external part. Radio-frequency systems transform unequal impedances with reactive matching networks. Matching matters wherever an interconnect acts as a transmission line, and the discipline is to apply it where reflections would otherwise erode timing margin or waste transmitted power, then confirm the result by measurement.
Related Topics
- Transmission Line Fundamentals - characteristic impedance, propagation delay, and the conditions under which an interconnect must be treated as a transmission line.
- Reflections and Signal Quality - how impedance discontinuities create reflections and the termination strategies that preserve signal quality.
- Differential Signaling - complementary pairs, their differential impedance, and the balanced termination that matches them.
- Loss and Equalization - frequency-dependent channel loss and the equalization that compensates for what matching alone cannot.
- Power Distribution Networks - the target-impedance methodology that applies matching principles to power delivery.
- Power Integrity Interaction - how termination current and return paths couple signaling into the power network.