Electronics Guide

Definition and Meaning

For a two-port network, the four S-parameters relate incident and reflected wave amplitudes:

• S₁₁ (Input Reflection): Ratio of reflected to incident wave at port 1 with port 2 terminated; indicates how well the input is matched
• S₂₁ (Forward Transmission): Ratio of wave emerging from port 2 to wave incident on port 1; represents forward gain or loss
• S₁₂ (Reverse Transmission): Ratio of wave emerging from port 1 to wave incident on port 2; represents reverse isolation or feedback
• S₂₂ (Output Reflection): Ratio of reflected to incident wave at port 2 with port 1 terminated; indicates output match quality

S-parameters are complex quantities with magnitude and phase, typically measured at a reference impedance of 50 ohms. They are frequency-dependent and must be characterized across the operating bandwidth.

Interpreting S-Parameter Data

S-parameter magnitudes are often expressed in decibels:

• |S₂₁| in dB = 20 log₁₀|S₂₁| represents forward gain
• |S₁₁| in dB = 20 log₁₀|S₁₁| represents the input reflection; return loss is the negative of this quantity, so a reflection of −15 dB is a return loss of 15 dB
• |S₁₂| in dB = 20 log₁₀|S₁₂| represents reverse transmission; reverse isolation is its negative, so a more negative reverse transmission means less feedback

Datasheets and network analyzers usually plot the raw S-parameter magnitudes in decibels, which are negative for a reflective or attenuating quantity, while specifications quote return loss and isolation as positive numbers. The two conventions describe the same measurement, and confusing them inverts the sign of a requirement.

Several working rules of thumb attach to these numbers, rather than hard limits. A port is usually called well matched once |S₁₁| or |S₂₂| falls below −10 dB, which corresponds to a VSWR of approximately 1.9:1. Discrete small-signal stages commonly deliver |S₂₁| somewhere between 10 and 25 dB at their design frequency, and a well-behaved stage typically shows |S₁₂| between −20 and −40 dB. The device technology, the frequency, and the system specification decide what is actually acceptable in a given design.

S-Parameter Measurement

Vector network analyzers (VNAs) measure S-parameters by applying signals to each port in turn while terminating the other port in the reference impedance. The VNA separates incident and reflected waves using directional couplers, measuring both magnitude and phase. Proper calibration using known standards (open, short, load, through) removes systematic errors from cables and fixturing.

Conjugate Matching for Maximum Gain

Maximum power transfer occurs when the source presents the complex conjugate of the amplifier input impedance, and the load presents the conjugate of the output impedance. For a unilateral device (S₁₂ = 0), these impedances are simply:

• Optimum source reflection coefficient: Γ_S = S₁₁^*
• Optimum load reflection coefficient: Γ_L = S₂₂^*

For bilateral devices with significant S₁₂, the optimum source and load impedances are interdependent: changing the load moves the input impedance, which in turn moves the required source impedance. The simultaneous conjugate match conditions therefore yield reflection coefficients that depend on all four S-parameters, calculated from the stability factor and auxiliary coefficients, and they have a passive solution only when the device is unconditionally stable.

L-Section Matching Networks

The simplest matching network uses two reactive elements in an L configuration. The design process involves:

1. Determine the required impedance transformation from source to device input
2. Choose the L-network topology based on whether upward or downward transformation is needed
3. Calculate component values using Smith chart or analytical formulas
4. Verify the match quality and bandwidth

For transforming from resistance R₁ to R₂, where R₁ < R₂:

• Q = √((R₂/R₁) − 1)
• Series reactance X_s = QR₁
• Shunt reactance X_p = R₂/Q

The series element connects to the lower resistance side, and the shunt element connects to the higher resistance side. Reactive elements can be capacitive or inductive depending on sign requirements. The loaded Q, and therefore the bandwidth, follows entirely from the resistance ratio: an L-section transforming 5 ohms to 50 ohms gives Q = 3, and the designer has no freedom to trade that value against anything else. Networks with a third element exist precisely to recover that freedom.

Pi and T Matching Networks

Three-element networks provide additional design freedom, allowing independent control of Q factor and bandwidth:

• Pi network: Two shunt elements with a series element between; provides low-pass or high-pass response depending on element types
• T network: Two series elements with a shunt element between; dual of the pi network

These networks can achieve any desired Q (within practical limits), enabling narrowband designs for selectivity or lower Q for broader bandwidth. The virtual resistance concept simplifies design: the network transforms through an intermediate resistance determined by the chosen Q. A pi network passes through a virtual resistance below both terminations, while a T network passes through one above both, and each is analyzed as two back-to-back L-sections meeting at that intermediate value.

Smith Chart Design Techniques

The Smith chart provides a graphical tool for matching network design:

• Plot the load impedance (normalized to reference impedance)
• Series elements move along constant resistance circles
• Shunt elements move along constant conductance circles
• Navigate from load to desired source impedance using available components

Computer-aided design tools automate this process but understanding Smith chart techniques builds intuition for RF design and troubleshooting.

Stability Conditions

An amplifier is unconditionally stable if it remains stable for any passive source and load impedance. The conditions for unconditional stability are:

• Rollett stability factor K > 1
• Auxiliary condition: |Δ| < 1, where Δ = S₁₁S₂₂ − S₁₂S₂₁

The Rollett factor K is calculated as:

K = (1 − |S₁₁|² − |S₂₂|² + |Δ|²) / (2|S₁₂||S₂₁|)

When K > 1 and |Δ| < 1, the device is unconditionally stable at that frequency. If K < 1, the device is potentially unstable, and certain source or load impedances will cause oscillation. The auxiliary condition is not decoration: Woods showed that K > 1 on its own does not prove stability, which is why the K test is always quoted as a pair of simultaneous conditions. Evaluate both at every frequency where the device has gain, not merely across the intended band, since transistors are frequently potentially unstable well below their operating frequency.

Stability Circle Construction

When K < 1, stability circles define the boundary between stable and unstable regions on the Smith chart:

• Source stability circle: Locus of source reflection coefficients that make |Γ_out| = 1
• Load stability circle: Locus of load reflection coefficients that make |Γ_in| = 1

The circles are calculated from S-parameters:

• Source circle center: C_S = (S₁₁ − ΔS₂₂^*)^* / (|S₁₁|² − |Δ|²)
• Source circle radius: r_S = |S₁₂S₂₁| / ||S₁₁|² − |Δ|²|
• Load circle center: C_L = (S₂₂ − ΔS₁₁^*)^* / (|S₂₂|² − |Δ|²)
• Load circle radius: r_L = |S₁₂S₂₁| / ||S₂₂|² − |Δ|²|

Note the two conjugations in each center expression and the outer absolute value in each denominator. The source circle is built from S₁₁ and the load circle from S₂₂; transposing the two, or dropping the conjugate on the second S-parameter, produces a circle that looks plausible on the chart and is wrong.

Determining Stable Regions

The stability circle divides the Smith chart into stable and unstable regions. To determine which region is stable:

1. Test a convenient point, typically the Smith chart center (50 ohms)
2. Calculate |Γ_in| or |Γ_out| with that termination
3. If |Γ| < 1, the region containing the test point is stable
4. If |Γ| > 1, the region containing the test point is unstable

The center is convenient because the answer there is immediate. With the load at the center of the chart, Γ_L = 0 and Γ_in = S₁₁, so the chart center lies in the stable region whenever |S₁₁| < 1 and in the unstable region whenever |S₁₁| > 1.

For potentially unstable devices, the matching network must present impedances that remain within the stable region across the entire operating bandwidth, including manufacturing tolerances.

Mu Factor Analysis

An alternative single-parameter stability measure, the mu factor introduced by Edwards and Sinsky in 1992, is defined as:

μ = (1 − |S₁₁|²) / (|S₂₂ − ΔS₁₁^*| + |S₁₂S₂₁|)

The quantity is geometric: it is the distance, measured in Smith chart radii from the center of the chart, to the nearest unstable point in the load plane. The device is therefore unconditionally stable when μ > 1, because the unstable region then lies entirely outside the unit circle and no passive load can reach it. Because μ is a distance rather than a ratio, it reports the stability margin directly: a value of 1.5 places the nearest unstable load half a chart radius beyond the edge, while a value of 1.02 places it barely outside.

A companion parameter performs the same test in the source plane:

μ′ = (1 − |S₂₂|²) / (|S₁₁ − ΔS₂₂^*| + |S₁₂S₂₁|)

Edwards and Sinsky showed that the two tests are equivalent, so either μ > 1 or μ′ > 1 on its own is both necessary and sufficient for unconditional stability. That is the advantage over the K and |Δ| pair, which requires two simultaneous conditions and, because K is a ratio, yields no comparable measure of remaining margin. When two candidate devices or two bias points both satisfy K > 1, comparing their mu factors ranks them; comparing their K factors does not.

Maximum Available Gain

For an unconditionally stable device, the Maximum Available Gain (MAG) represents the highest gain achievable with simultaneous conjugate matching:

MAG = (|S₂₁|/|S₁₂|)(K − √(K² − 1))

The expression is valid only for K > 1. Below that the radical is imaginary, and the minus sign before it selects the branch that applies to an unconditionally stable device. This gain occurs when both input and output are conjugate matched simultaneously, and it is the ceiling on what any lossless matching network can extract from the device.

For potentially unstable devices, where K ≤ 1, no simultaneous conjugate match exists with passive terminations, and the Maximum Stable Gain (MSG) is quoted instead:

MSG = |S₂₁|/|S₁₂|

MSG is the value that MAG approaches as K rises to 1, and it is the figure datasheets plot below the frequency at which K reaches unity. It represents the gain available at the very edge of stability, so a practical design stabilizes the device first, with resistive loading or feedback, and then works with the lower gain that stabilization leaves once K exceeds 1.

Available Power Gain

The available power gain (G_A) is the ratio of power available from the network to power available from the source. It depends only on the source termination (and the device), not on the load:

G_A = |S₂₁|²(1 − |Γ_S|²) / ((1 − |Γ_out|²)|1 − S₁₁Γ_S|²)

where Γ_out = S₂₂ + S₁₂S₂₁Γ_S/(1 − S₁₁Γ_S)

The definition assumes the output is conjugate matched to Γ_out, which is why no load term appears. Because both available gain and noise figure are functions of the source reflection coefficient, available gain circles and noise circles can be plotted together in the source plane. This makes G_A the natural gain measure for low-noise design: different source impedances yield different available gains, and constant gain circles represent the source impedances that achieve a specified gain. The complementary operating power gain, G_P, depends only on the load and is the corresponding measure when the load plane is the design variable.

Constant Gain Circle Construction

Constant available gain circles in the source plane are centered at:

C_a = g_aC₁^* / (1 + g_a(|S₁₁|² − |Δ|²))

with radius:

r_a = √(1 − 2K|S₁₂||S₂₁|g_a + (|S₁₂||S₂₁|g_a)²) / |1 + g_a(|S₁₁|² − |Δ|²)|

where g_a is the normalized gain, G_A divided by |S₂₁|², and C₁ = S₁₁ − ΔS₂₂^*. Note that K appears inside the radical, so the same stability factor that decides whether MAG exists also sets the size of every gain circle.

Higher gain circles are smaller and lie closer to the simultaneous conjugate match point, where the radius collapses to zero and the gain equals MAG. Lower gain circles are larger, offering more flexibility in choosing a source impedance for other objectives such as noise figure. Every center lies on the straight line drawn from the origin through C₁^*, which makes the whole family easy to sketch once one circle is known.

Gain Trade-off Design

Gain circles enable informed design trade-offs:

• Accept slightly less than maximum gain to improve stability margin
• Choose a source impedance on a gain circle that also achieves acceptable noise figure
• Select impedances that can be realized with practical matching networks
• Balance gain against bandwidth requirements

Backing off from the maximum is usually cheap. Because the gain circles crowd together near the conjugate match point, giving up the last fraction of a decibel of gain buys a large region of usable source impedances, and that region is where a manufacturable, low-noise, tolerant design is found.

Noise Parameters

The noise behavior of an amplifier is characterized by four noise parameters:

• Minimum noise figure (F_min): The lowest achievable noise figure with optimum source impedance
• Optimum source reflection coefficient (Γ_opt): Source impedance that yields F_min, specified as a magnitude and an angle
• Equivalent noise resistance (R_n): Sensitivity of noise figure to source impedance mismatch, often tabulated in normalized form as r_n = R_n/Z₀
• Optimum source impedance (Z_opt): Complex impedance corresponding to Γ_opt

The magnitude and angle of Γ_opt count as two of the four, so the set is four real numbers rather than four complex ones. All of them vary with frequency and with bias current. They are typically provided in device datasheets or measured with a tuner-based noise parameter extraction system.

Noise Figure Versus Source Impedance

The noise figure varies with source impedance according to:

F = F_min + (4R_n/Z₀)|Γ_S − Γ_opt|² / ((1 − |Γ_S|²)|1 + Γ_opt|²)

where Z₀ is the reference impedance, and F and F_min are power ratios rather than decibel values. This equation shows that noise figure is minimized when Γ_S equals Γ_opt. Departures from the optimum increase noise figure at a rate proportional to R_n. Devices with small R_n are less sensitive to source mismatch, making them easier to design with, and are the natural choice when the input network must also satisfy a return loss specification.

Constant Noise Figure Circles

For a specified noise figure F > F_min, the constant noise circle defines the locus of source impedances that achieve that noise figure:

Circle center: C_F = Γ_opt / (1 + N)

Circle radius: r_F = √(N(N + 1 − |Γ_opt|²)) / (1 + N)

where N = (F − F_min)|1 + Γ_opt|² / (4R_n/Z₀)

The noise figure parameter N is dimensionless and rises from zero as the specified F moves above F_min. At N = 0 the circle collapses to a point at Γ_opt. Higher noise figure circles are larger, and their centers slide along the line from Γ_opt toward the origin, providing progressively more flexibility in source impedance selection.

Low-Noise Amplifier Design

LNA design typically involves these steps:

1. Plot noise circles for the required noise figure
2. Plot gain circles for acceptable gain
3. Verify stability with the candidate source impedances
4. Select a source impedance in the intersection of acceptable noise and gain regions
5. Design the output matching network for the selected source impedance
6. Iterate if necessary to meet all specifications

Often, the optimum noise match does not coincide with the conjugate match for maximum gain. The designer must decide how much gain to sacrifice for improved noise figure, or accept higher noise for increased gain. A common compromise places the source impedance on the line between Γ_opt and the simultaneous conjugate match point. One classical technique narrows the gap instead of splitting it: a small inductance in the source or emitter lead of a FET or bipolar device moves the input impedance toward Γ_opt while adding little noise of its own, which is why inductive degeneration appears in so many integrated LNAs.

Sources of Internal Feedback

Several mechanisms create feedback paths in RF transistors:

• Collector-base capacitance (C_cb): The primary feedback path in BJTs, causing Miller effect and reverse transmission
• Drain-gate capacitance (C_gd): Equivalent feedback mechanism in FETs
• Package parasitics: Lead inductance and inter-lead capacitance create additional feedback paths
• Common-lead inductance: Emitter or source inductance couples input and output circuits

The first two scale with device size and shrink with reverse bias, so the same transistor is more nearly unilateral at a higher supply voltage. The package contributions do not scale at all, which is why a die that is unconditionally stable under a wafer probe can become potentially unstable once it is bonded into a package.

Neutralization Techniques

Neutralization cancels internal feedback by introducing an external feedback path of equal magnitude but opposite phase:

• Capacitive neutralization: A capacitor feeds back a portion of the output signal to cancel C_cb or C_gd feedback
• Inductive neutralization: Uses transformer action to generate the canceling signal
• Cross-neutralization: In push-pull or differential configurations, couples each device to the opposite input

Proper neutralization makes the device nearly unilateral, driving S₁₂ toward zero, which dramatically simplifies matching network design and improves stability. However, neutralization is frequency-sensitive and may not track over wide bandwidths, and the cancellation depends on component values that drift with temperature and tolerance. Cross-neutralization in a differential pair is the most robust of the three, because the canceling capacitance is a matched copy of the offending one on the same die.

Resistive Feedback for Stability

Resistive feedback intentionally reduces gain to ensure unconditional stability:

• Shunt feedback: Resistor from output to input reduces gain and lowers input/output impedances
• Series feedback: Resistor in emitter/source circuit reduces gain and increases input impedance
• Lossy matching: Adding resistance to matching networks absorbs reflections

While resistive feedback reduces maximum achievable gain, it provides predictable, frequency-independent stabilization. The feedback also widens bandwidth and can improve input and output VSWR. The cost lands on noise figure, because every stabilizing resistor near the input contributes thermal noise, so the technique suits an interstage gain block far better than a first-stage LNA. Where stabilization must not degrade noise, placing the resistive element on the output side, or making it lossy only outside the band of interest, gives most of the stability benefit for a fraction of the noise penalty.

Balanced Amplifier Configuration

Balanced amplifiers combine two identical stages with 90° hybrid couplers, providing excellent input and output match regardless of individual stage matching:

• Input coupler splits signal to two paths with 90° phase difference
• Reflections from mismatched devices combine at the isolated port and cancel at the input
• Output coupler recombines amplified signals, directing reflections to a terminated port

The match of a balanced pair is set by the balance and isolation of its couplers rather than by the devices, and a well-built branch-line or Lange coupler commonly holds |S₁₁| and |S₂₂| near −20 dB or better across its design band. The configuration also degrades gracefully: if one device fails, the pair continues to work at reduced output rather than failing outright. The costs are board area, the insertion loss of a coupler ahead of the devices, and the noise figure penalty that loss imposes, which rules the topology out for the first stage of a sensitive receiver.

Cascade Gain and Noise

For cascaded stages, the overall gain in decibels is the sum of individual stage gains:

G_total (dB) = G₁ (dB) + G₂ (dB) + G₃ (dB) + ...

The cascade noise figure follows the Friis formula:

F_total = F₁ + (F₂ − 1)/G₁ + (F₃ − 1)/(G₁G₂) + ...

Every F and G in the Friis formula is a power ratio rather than a decibel value, and the gains are available gains referred to the actual interstage impedances rather than the 50 ohm figures printed on a datasheet. The formula emphasizes the importance of the first stage: its noise figure dominates, and its gain suppresses noise contributions from subsequent stages. A high-gain, low-noise first stage is essential for receiver front ends, and any loss ahead of it, whether from a filter, a switch, or a length of cable, adds to the system noise figure decibel for decibel.

Interstage Matching Considerations

The interstage network must satisfy multiple constraints:

• Transform the output impedance of one stage to the desired source impedance for the next
• Maintain stability at both interfaces
• Provide required frequency selectivity or bandwidth
• Allow for bias insertion without disturbing RF performance

Unlike input and output matching where source and load are fixed, the designer has more flexibility in interstage matching because both terminations are under design control. That freedom is also a trap: a network optimized only in band can present a high-Q resonance or a near-open circuit out of band, which is exactly the termination a potentially unstable device needs in order to oscillate.

Stage Partitioning

Optimal cascade design considers the role of each stage:

• First stage: Optimized for noise, with sufficient gain to set system noise figure; typically uses the lowest-noise device available
• Middle stages: Provide gain with moderate noise contribution; may use higher-gain devices
• Output stage: Delivers required output power; may use larger device for linearity at higher signal levels

The gain distribution should prevent overload in later stages while ensuring the first stage dominates overall noise. The two goals pull against each other, because noise figure improves with gain early in the chain while intermodulation performance improves with gain held back until late in it. The usual resolution places just enough gain in the first stage to bury the noise of the second, and defers the remaining gain until after any filtering that removes the strongest interferers.

Cascade Stability Analysis

Each stage must be stable with its actual source and load impedances (the preceding and following stages), not just 50 ohms. Additionally, the overall cascade must be stable:

• Analyze individual stage stability with actual interstage impedances
• Check for potential oscillation through the complete loop
• Verify stability across frequency, including out-of-band
• Consider manufacturing variations and temperature effects

Stability factors computed at the ports of a single stage are a necessary check, not a sufficient one. A multistage amplifier can also oscillate through a loop that closes outside the signal path, by way of a shared bias rail, a common ground return, or radiated coupling between the input and output ends of the board.

Bandwidth Limitations

The Bode-Fano criterion sets fundamental limits on achievable bandwidth for a given load quality factor. For a parallel RC load:

∫₀^∞ ln(1/|Γ|) dω ≤ π/(RC)

The integral is a fixed budget that no matching network, however elaborate, can enlarge; a network can only redistribute it across frequency. Spending the budget on a deep match over a narrow band leaves nothing for the rest, and spreading it over a wide band limits how good the match can be anywhere. For a highly reactive load, meaning a large RC product, the budget is small to begin with. Broadband design therefore consists of accepting a modest, deliberately uniform mismatch across the band rather than chasing a perfect match at the center. Other load topologies, such as a series RL load, obey bounds of the same form with different right-hand sides.

Multi-Section Matching Networks

Adding more sections to matching networks can improve bandwidth:

• Two-section networks: Provide wider bandwidth than single L-sections with moderate complexity
• Chebyshev matching: Equal ripple response maximizes bandwidth for a given return loss specification
• Binomial (maximally flat): No ripple in passband but narrower bandwidth than Chebyshev

Each additional section can extend bandwidth but adds complexity and insertion loss. Practical designs balance bandwidth against realizability, and the returns diminish quickly: component tolerance and parasitics usually erase the theoretical advantage of a fifth or sixth section long before the arithmetic does.

Transmission Line Transformers

Transmission line transformers use coupled lines to achieve broadband impedance transformation:

• Quarter-wave transformers: Impedance transformation over moderate bandwidths using a line of characteristic impedance √(Z₁Z₂)
• Tapered lines: Gradual impedance transition provides ultra-wide bandwidth
• Guanella and Ruthroff transformers: Wound coaxial structures for HF through UHF impedance transformation

The quarter-wave result holds for real terminations, and the match is exact only where the line is electrically λ/4, degrading on either side of that frequency. Transmission line approaches are particularly effective above 100 MHz, where a quarter wavelength is short enough to print on a board.

Resistive Matching

Adding resistance to matching networks provides broadband match at the cost of gain and noise figure:

• Bridged-T attenuator: Provides impedance matching with flat frequency response
• Resistive splitters and combiners: Achieve broadband power division with inherent matching
• Feedback amplifiers: Resistive feedback flattens gain and improves match over wide bandwidths

For applications where noise figure is not critical, resistive matching offers a practical path to multi-octave bandwidth. The penalty is direct: an attenuator ahead of a stage adds its own loss to the system noise figure decibel for decibel, and a resistive two-way splitter gives up more power than its reactive counterpart.

Distributed Amplifiers

Distributed amplifiers achieve extreme bandwidths by absorbing device capacitances into artificial transmission lines:

• Input capacitances of multiple devices form the shunt elements of an input transmission line
• Output capacitances similarly form an output transmission line
• Device transconductances add along the output line, so gain grows with the number of devices rather than multiplying as in a cascade
• Bandwidth extends from DC to the cutoff frequency of the artificial lines

Because the contributions add rather than multiply, gain grows only in proportion to the number of devices, and each added section brings more line loss, so an optimum device count exists beyond which gain falls again. Published designs in gallium arsenide and indium phosphide processes reach bandwidths of many tens of gigahertz, with the fastest extending past 100 GHz, at modest gain per stage. Distributed amplifiers are commonly used in sampling oscilloscopes, high-speed test equipment, and optical communication systems that require multi-octave bandwidth.

Bias Point Selection

The DC operating point affects all RF parameters:

• Gain: Transconductance varies with bias current; higher current generally means higher gain
• Noise figure: Minimum noise often occurs at a specific current, typically below the maximum gain point
• Linearity: Higher bias current improves IP3 and P_{1 dB} compression
• Power consumption: Lower current extends battery life but may compromise performance
• Stability: S-parameters change with bias, affecting stability margins

Optimal bias represents a trade-off among these factors based on application requirements. Because the S-parameters and all four noise parameters shift with the operating point, a design must use the data set measured at the bias actually chosen. Interpolating between datasheet bias conditions is a common reason a first prototype neither matches nor meets its noise specification.

Bias Network Topology

Common biasing arrangements include:

• Fixed bias: Simple resistor dividers set DC operating point; susceptible to device variations
• Self bias: Feedback through emitter/source resistor stabilizes operating point against device variations
• Active bias: Current mirrors or regulators provide precise, temperature-compensated bias
• PTAT bias: Proportional-to-absolute-temperature current source compensates for device temperature coefficient

Depletion-mode devices such as GaAs MESFETs and most HEMTs require a negative gate voltage, which adds a charge pump or a second supply rail, and they demand a sequencing circuit that applies the gate bias before the drain supply and removes it afterward. Applying drain voltage to an ungated depletion device draws its full saturation current and can destroy it.

RF Chokes and Bypass Capacitors

Bias networks must feed DC without affecting RF performance:

• RF chokes: Inductors that appear as high impedance at RF while passing DC; must not self-resonate within the operating band
• Bypass capacitors: Provide low-impedance AC ground at bias nodes; multiple values may be needed to cover wide bandwidth
• Quarter-wave stubs: Open-circuit stubs appear as short circuit at their quarter-wave frequency, providing effective RF grounding

Every real inductor and capacitor has a self-resonant frequency, above which the choke behaves as a capacitor and the bypass capacitor as an inductor. Staggering several bypass values covers a wider band, but two capacitors in parallel also form an anti-resonance between their self-resonances, at which the bias node impedance rises rather than falls. At microwave frequencies, careful attention to layout is essential to prevent such resonances and to ensure proper RF isolation of bias circuits.

Bias Stability Over Temperature

RF device parameters shift with temperature, and bias circuits must compensate:

• BJT base-emitter voltage falls by roughly 2 mV for each degree Celsius of temperature rise, at constant collector current
• FET threshold voltage shifts with temperature
• Gain and noise figure vary with operating point

A fixed voltage divider driving a bipolar base therefore raises the collector current as the device warms, which warms it further. That loop is what makes a plain fixed-bias arrangement unsuitable for anything dissipating appreciable power. Well-designed bias circuits maintain the desired operating point despite temperature variations, using temperature-compensated voltage references, PTAT current sources, or active feedback techniques.

Low-Noise Amplifier Design Flow

A typical LNA design proceeds as follows:

1. Define specifications: frequency range, noise figure, gain, input/output return loss, power consumption
2. Select appropriate device based on noise parameters and gain capability
3. Choose bias point balancing noise, gain, and current consumption
4. Check stability at the design bias; add stabilization if K < 1 or μ < 1
5. Plot noise and gain circles; select source impedance for best noise figure with acceptable gain
6. Design input matching network to present selected source impedance
7. Calculate output impedance with the selected source impedance
8. Design output matching network for desired output match
9. Simulate complete circuit including bias networks and parasitics
10. Optimize and verify performance across frequency and temperature

The order matters. Stabilizing the device before plotting circles avoids drawing a gain circle through a region the finished amplifier can never use, and calculating the output impedance only after the source is fixed reflects the fact that a bilateral device's output depends on what its input sees.

Layout Considerations

RF layout significantly impacts amplifier performance:

• Ground vias: Multiple vias close to components minimize ground inductance
• Component placement: Minimize lead lengths; orient components to reduce coupling
• Transmission lines: Use controlled-impedance lines; account for discontinuities
• Shielding: Separate input and output to prevent oscillation; use ground fences if needed
• Thermal management: Provide adequate heat sinking for power dissipation

Source or emitter inductance deserves particular attention, because it acts as series feedback whether or not the designer intended it. A fraction of a nanohenry of via inductance under a source pad measurably alters the input impedance, moves Γ_opt, and changes the stability factors, so those vias belong in the electromagnetic simulation rather than in the list of parasitics discovered on the bench.

Test and Characterization

Essential measurements for RF amplifier verification:

• S-parameters: Vector network analyzer measures gain, return loss, and isolation versus frequency
• Noise figure: Y-factor method with calibrated noise source determines noise performance
• Compression point: Signal generator and power meter find P_{1 dB}
• Intermodulation: Two-tone test with spectrum analyzer measures IP3
• Stability: Sweep frequency and vary source/load impedances to verify no oscillation

Measure the S-parameters over a far wider span than the operating band, because an amplifier oscillating out of band may look unremarkable in band until a spectrum analyzer is connected. Confirm a noise figure result against a second method or a known reference amplifier, since the Y-factor technique is sensitive to the impedance the noise source presents in its on and off states, and a low-noise stage is exactly the case where that error matters most.