Electronics Guide

Definition and Meaning

For a two-port network, the four S-parameters relate incident and reflected wave amplitudes:

• S11 (Input Reflection): Ratio of reflected to incident wave at port 1 with port 2 terminated; indicates how well the input is matched
• S21 (Forward Transmission): Ratio of wave emerging from port 2 to wave incident on port 1; represents forward gain or loss
• S12 (Reverse Transmission): Ratio of wave emerging from port 1 to wave incident on port 2; represents reverse isolation or feedback
• S22 (Output Reflection): Ratio of reflected to incident wave at port 2 with port 1 terminated; indicates output match quality

S-parameters are complex quantities with magnitude and phase, typically measured at a reference impedance of 50 ohms. They are frequency-dependent and must be characterized across the operating bandwidth.

Interpreting S-Parameter Data

S-parameter magnitudes are often expressed in decibels:

• |S21|dB = 20 log10(|S21|) represents gain in dB
• |S11|dB = 20 log10(|S11|) represents return loss (more negative is better match)
• |S12|dB = 20 log10(|S12|) represents isolation (more negative means less feedback)

A well-matched port has |S11| or |S22| less than -10 dB (VSWR less than 2:1). High-gain amplifiers have |S21| of 10-25 dB, while isolation |S12| may be -20 to -40 dB for well-designed stages.

S-Parameter Measurement

Vector network analyzers (VNAs) measure S-parameters by applying signals to each port in turn while terminating the other port in the reference impedance. The VNA separates incident and reflected waves using directional couplers, measuring both magnitude and phase. Proper calibration using known standards (open, short, load, through) removes systematic errors from cables and fixturing.

Conjugate Matching for Maximum Gain

Maximum power transfer occurs when the source presents the complex conjugate of the amplifier input impedance, and the load presents the conjugate of the output impedance. For a unilateral device (S12 = 0), these impedances are simply:

• Optimum source reflection coefficient: Gamma_S = S11*
• Optimum load reflection coefficient: Gamma_L = S22*

For bilateral devices with significant S12, the optimum source and load impedances are interdependent. The simultaneous conjugate match conditions yield reflection coefficients that depend on all four S-parameters, calculated using stability factor and auxiliary coefficients.

L-Section Matching Networks

The simplest matching network uses two reactive elements in an L configuration. The design process involves:

1. Determine the required impedance transformation from source to device input
2. Choose the L-network topology based on whether upward or downward transformation is needed
3. Calculate component values using Smith chart or analytical formulas
4. Verify the match quality and bandwidth

For transforming from resistance R1 to R2 where R1 less than R2:

• Q = sqrt((R2/R1) - 1)
• Series reactance X_s = Q times R1
• Shunt reactance X_p = R2 / Q

The series element connects to the lower resistance side, and the shunt element connects to the higher resistance side. Reactive elements can be capacitive or inductive depending on sign requirements.

Pi and T Matching Networks

Three-element networks provide additional design freedom, allowing independent control of Q factor and bandwidth:

• Pi network: Two shunt elements with a series element between; provides low-pass or high-pass response depending on element types
• T network: Two series elements with a shunt element between; dual of the pi network

These networks can achieve any desired Q (within practical limits), enabling narrowband designs for selectivity or lower Q for broader bandwidth. The virtual resistance concept simplifies design: the network transforms through an intermediate resistance determined by the chosen Q.

Smith Chart Design Techniques

The Smith chart provides a graphical tool for matching network design:

• Plot the load impedance (normalized to reference impedance)
• Series elements move along constant resistance circles
• Shunt elements move along constant conductance circles
• Navigate from load to desired source impedance using available components

Computer-aided design tools automate this process but understanding Smith chart techniques builds intuition for RF design and troubleshooting.

Stability Conditions

An amplifier is unconditionally stable if it remains stable for any passive source and load impedance. The conditions for unconditional stability are:

• Rollett stability factor K greater than 1
• Auxiliary condition: |delta| less than 1, where delta = S11 times S22 minus S12 times S21

The Rollett factor K is calculated as:

K = (1 - |S11|^2 - |S22|^2 + |delta|^2) / (2|S12||S21|)

When K greater than 1 and |delta| less than 1, the device is unconditionally stable at that frequency. If K less than 1, the device is potentially unstable, and certain source or load impedances will cause oscillation.

Stability Circle Construction

When K less than 1, stability circles define the boundary between stable and unstable regions on the Smith chart:

• Source stability circle: Locus of source reflection coefficients that make |Gamma_out| = 1
• Load stability circle: Locus of load reflection coefficients that make |Gamma_in| = 1

The circles are calculated from S-parameters:

• Source circle center: C_S = (S11 - delta times S22*)* / (|S11|^2 - |delta|^2)
• Source circle radius: r_S = |S12 times S21| / ||S11|^2 - |delta|^2|
• Load circle center: C_L = (S22 - delta times S11*)* / (|S22|^2 - |delta|^2)
• Load circle radius: r_L = |S12 times S21| / ||S22|^2 - |delta|^2|

Determining Stable Regions

The stability circle divides the Smith chart into stable and unstable regions. To determine which region is stable:

1. Test a convenient point, typically the Smith chart center (50 ohms)
2. Calculate |Gamma_in| or |Gamma_out| with that termination
3. If |Gamma| less than 1, the region containing the test point is stable
4. If |Gamma| greater than 1, the region containing the test point is unstable

For potentially unstable devices, the matching network must present impedances that remain within the stable region across the entire operating bandwidth, including manufacturing tolerances.

Mu Factor Analysis

An alternative single-parameter stability measure, the mu factor, is defined as:

mu = (1 - |S11|^2) / (|S22 - delta times S11*| + |S12 times S21|)

The device is unconditionally stable if mu greater than 1. The mu factor directly indicates stability margin: larger values mean greater stability. Unlike the K-delta test, mu requires only a single condition, simplifying stability analysis.

Maximum Available Gain

For an unconditionally stable device, the Maximum Available Gain (MAG) represents the highest gain achievable with simultaneous conjugate matching:

MAG = (|S21|/|S12|)(K - sqrt(K^2 - 1))

This gain occurs when both input and output are conjugate matched simultaneously. For potentially unstable devices (K less than 1), the Maximum Stable Gain (MSG) is defined:

MSG = |S21|/|S12|

MSG represents the maximum gain before oscillation, but achieving this gain requires operation at the edge of stability.

Operating Power Gain

The operating power gain (Gp) depends on both source and load terminations:

Gp = |S21|^2(1 - |Gamma_L|^2) / ((1 - |Gamma_in|^2)|1 - S22 times Gamma_L|^2)

where Gamma_in = S11 + S12 times S21 times Gamma_L/(1 - S22 times Gamma_L)

For a fixed load impedance, different source impedances yield different operating gains. Constant gain circles represent source impedances that achieve a specified gain.

Constant Gain Circle Construction

Constant operating gain circles are centered at:

C_p = g_p times C1* / (1 + g_p(|C1|^2 - |delta|^2/|S22|^2))

with radius:

r_p = sqrt(1 - 2K|S12||S21|g_p + (|S12||S21|g_p)^2) / |1 + g_p(|C1|^2 - |delta|^2/|S22|^2)|

where g_p is the normalized gain (actual gain divided by |S21|^2) and C1 = S11 - delta times S22*.

Higher gain circles are smaller and closer to the conjugate match point. Lower gain circles are larger, offering more flexibility in choosing source impedance for other objectives.

Gain Trade-off Design

Gain circles enable informed design trade-offs:

• Accept slightly less than maximum gain to improve stability margin
• Choose a source impedance on a gain circle that also achieves acceptable noise figure
• Select impedances that can be realized with practical matching networks
• Balance gain against bandwidth requirements

Noise Parameters

The noise behavior of an amplifier is characterized by four noise parameters:

• Minimum noise figure (Fmin): The lowest achievable noise figure with optimum source impedance
• Optimum source reflection coefficient (Gamma_opt): Source impedance that yields Fmin
• Equivalent noise resistance (Rn): Sensitivity of noise figure to source impedance mismatch
• Optimum source impedance (Zopt): Complex impedance corresponding to Gamma_opt

These parameters are typically provided in device datasheets or measured using specialized noise figure measurement systems.

Noise Figure Versus Source Impedance

The noise figure varies with source impedance according to:

F = Fmin + (4Rn/Z0)|Gamma_S - Gamma_opt|^2 / ((1 - |Gamma_S|^2)|1 + Gamma_opt|^2)

This equation shows that noise figure is minimized when Gamma_S equals Gamma_opt. Departures from optimum increase noise figure at a rate proportional to Rn. Devices with small Rn are less sensitive to source mismatch, making them easier to design with.

Constant Noise Figure Circles

For a specified noise figure F greater than Fmin, the constant noise circle defines the locus of source impedances that achieve that noise figure:

Circle center: C_F = Gamma_opt / (1 + N)

Circle radius: r_F = sqrt(N(N + 1 - |Gamma_opt|^2)) / (1 + N)

where N = (F - Fmin)|1 + Gamma_opt|^2 / (4Rn/Z0)

The minimum noise circle collapses to a point at Gamma_opt. Higher noise figure circles are larger, providing more flexibility in source impedance selection.

Low-Noise Amplifier Design

LNA design typically involves these steps:

1. Plot noise circles for the required noise figure
2. Plot gain circles for acceptable gain
3. Verify stability with the candidate source impedances
4. Select a source impedance in the intersection of acceptable noise and gain regions
5. Design the output matching network for the selected source impedance
6. Iterate if necessary to meet all specifications

Often, the optimum noise match does not coincide with the conjugate match for maximum gain. The designer must decide how much gain to sacrifice for improved noise figure, or accept higher noise for increased gain.

Sources of Internal Feedback

Several mechanisms create feedback paths in RF transistors:

• Collector-base capacitance (Ccb): The primary feedback path in BJTs, causing Miller effect and reverse transmission
• Drain-gate capacitance (Cgd): Equivalent feedback mechanism in FETs
• Package parasitics: Lead inductance and inter-lead capacitance create additional feedback paths
• Common-lead inductance: Emitter or source inductance couples input and output circuits

Neutralization Techniques

Neutralization cancels internal feedback by introducing an external feedback path of equal magnitude but opposite phase:

• Capacitive neutralization: A capacitor feeds back a portion of the output signal to cancel Ccb or Cgd feedback
• Inductive neutralization: Uses transformer action to generate the canceling signal
• Cross-neutralization: In push-pull or differential configurations, couples each device to the opposite input

Proper neutralization makes the device unilateral (S12 approaches 0), dramatically simplifying matching network design and improving stability. However, neutralization is frequency-sensitive and may not track over wide bandwidths.

Resistive Feedback for Stability

Resistive feedback intentionally reduces gain to ensure unconditional stability:

• Shunt feedback: Resistor from output to input reduces gain and lowers input/output impedances
• Series feedback: Resistor in emitter/source circuit reduces gain and increases input impedance
• Lossy matching: Adding resistance to matching networks absorbs reflections

While resistive feedback reduces maximum achievable gain, it provides predictable, frequency-independent stabilization. The feedback also widens bandwidth and can improve input/output VSWR.

Balanced Amplifier Configuration

Balanced amplifiers combine two identical stages with 90-degree hybrid couplers, providing excellent input and output match regardless of individual stage matching:

• Input coupler splits signal to two paths with 90-degree phase difference
• Reflections from mismatched devices combine at the isolated port and cancel at the input
• Output coupler recombines amplified signals, directing reflections to a terminated port

Balanced amplifiers achieve |S11| and |S22| approaching isolation of the couplers, typically -20 dB or better. The configuration inherently provides graceful degradation if one device fails.

Cascade Gain and Noise

For cascaded stages, the overall gain in decibels is the sum of individual stage gains:

G_total(dB) = G1(dB) + G2(dB) + G3(dB) + ...

The cascade noise figure follows the Friis formula:

F_total = F1 + (F2 - 1)/G1 + (F3 - 1)/(G1 times G2) + ...

This formula emphasizes the importance of the first stage: its noise figure dominates, and its gain suppresses noise contributions from subsequent stages. A high-gain, low-noise first stage is essential for receiver front ends.

Interstage Matching Considerations

The interstage network must satisfy multiple constraints:

• Transform the output impedance of one stage to the desired source impedance for the next
• Maintain stability at both interfaces
• Provide required frequency selectivity or bandwidth
• Allow for bias insertion without disturbing RF performance

Unlike input and output matching where source and load are fixed, the designer has more flexibility in interstage matching because both terminations are under design control.

Stage Partitioning

Optimal cascade design considers the role of each stage:

• First stage: Optimized for noise, with sufficient gain to set system noise figure; typically uses the lowest-noise device available
• Middle stages: Provide gain with moderate noise contribution; may use higher-gain devices
• Output stage: Delivers required output power; may use larger device for linearity at higher signal levels

The gain distribution should prevent overload in later stages while ensuring the first stage dominates overall noise.

Cascade Stability Analysis

Each stage must be stable with its actual source and load impedances (the preceding and following stages), not just 50 ohms. Additionally, the overall cascade must be stable:

• Analyze individual stage stability with actual interstage impedances
• Check for potential oscillation through the complete loop
• Verify stability across frequency, including out-of-band
• Consider manufacturing variations and temperature effects

Bandwidth Limitations

The Bode-Fano criterion sets fundamental limits on achievable bandwidth for a given load quality factor:

For a parallel RC load: integral from 0 to infinity of ln(1/|Gamma|) d(omega) less than or equal to pi/(RC)

This means that for a highly reactive load (high Q), the product of bandwidth and match quality is limited. Better match at center frequency necessarily means narrower bandwidth. Broadband design requires accepting modest mismatch across the band.

Multi-Section Matching Networks

Adding more sections to matching networks can improve bandwidth:

• Two-section networks: Provide wider bandwidth than single L-sections with moderate complexity
• Chebyshev matching: Equal ripple response maximizes bandwidth for a given return loss specification
• Binomial (maximally flat): No ripple in passband but narrower bandwidth than Chebyshev

Each additional section can extend bandwidth but adds complexity and insertion loss. Practical designs balance bandwidth against realizability.

Transmission Line Transformers

Transmission line transformers use coupled lines to achieve broadband impedance transformation:

• Quarter-wave transformers: Impedance transformation over moderate bandwidths using characteristic impedance equal to sqrt(Z1 times Z2)
• Tapered lines: Gradual impedance transition provides ultra-wide bandwidth
• Guanella and Ruthroff transformers: Wound coaxial structures for HF through UHF impedance transformation

Transmission line approaches are particularly effective above 100 MHz where line lengths become practical.

Resistive Matching

Adding resistance to matching networks provides broadband match at the cost of gain and noise figure:

• Bridged-T attenuator: Provides impedance matching with flat frequency response
• Resistive splitters and combiners: Achieve broadband power division with inherent matching
• Feedback amplifiers: Resistive feedback flattens gain and improves match over wide bandwidths

For applications where noise figure is not critical, resistive matching offers a practical path to multi-octave bandwidth.

Distributed Amplifiers

Distributed amplifiers achieve extreme bandwidths by absorbing device capacitances into artificial transmission lines:

• Input capacitances of multiple devices form the shunt elements of an input transmission line
• Output capacitances similarly form an output transmission line
• Gain is proportional to the number of stages
• Bandwidth extends from DC to the cutoff frequency of the artificial lines

Distributed amplifiers can achieve bandwidths of DC to 100 GHz in advanced technologies, though with modest gain per stage. They are commonly used in test equipment and communication systems requiring multi-octave bandwidth.

Bias Point Selection

The DC operating point affects all RF parameters:

• Gain: Transconductance varies with bias current; higher current generally means higher gain
• Noise figure: Minimum noise often occurs at a specific current, typically below the maximum gain point
• Linearity: Higher bias current improves IP3 and P1dB compression
• Power consumption: Lower current extends battery life but may compromise performance
• Stability: S-parameters change with bias, affecting stability margins

Optimal bias represents a trade-off among these factors based on application requirements.

Bias Network Topology

Common biasing arrangements include:

• Fixed bias: Simple resistor dividers set DC operating point; susceptible to device variations
• Self bias: Feedback through emitter/source resistor stabilizes operating point against device variations
• Active bias: Current mirrors or regulators provide precise, temperature-compensated bias
• PTAT bias: Proportional-to-absolute-temperature current source compensates for device temperature coefficient

RF Chokes and Bypass Capacitors

Bias networks must feed DC without affecting RF performance:

• RF chokes: Inductors that appear as high impedance at RF while passing DC; must not self-resonate within the operating band
• Bypass capacitors: Provide low-impedance AC ground at bias nodes; multiple values may be needed to cover wide bandwidth
• Quarter-wave stubs: Open-circuit stubs appear as short circuit at their quarter-wave frequency, providing effective RF grounding

At microwave frequencies, careful attention to layout is essential to prevent resonances and ensure proper RF isolation of bias circuits.

Bias Stability Over Temperature

RF device parameters shift with temperature, and bias circuits must compensate:

• BJT base-emitter voltage decreases approximately 2 mV per degree C
• FET threshold voltage shifts with temperature
• Gain and noise figure vary with operating point

Well-designed bias circuits maintain the desired operating point despite temperature variations, using temperature-compensated voltage references, PTAT current sources, or active feedback techniques.

Low-Noise Amplifier Design Flow

A typical LNA design proceeds as follows:

1. Define specifications: frequency range, noise figure, gain, input/output return loss, power consumption
2. Select appropriate device based on noise parameters and gain capability
3. Choose bias point balancing noise, gain, and current consumption
4. Check stability at the design bias; add stabilization if K less than 1
5. Plot noise and gain circles; select source impedance for best noise figure with acceptable gain
6. Design input matching network to present selected source impedance
7. Calculate output impedance with the selected source impedance
8. Design output matching network for desired output match
9. Simulate complete circuit including bias networks and parasitics
10. Optimize and verify performance across frequency and temperature

Layout Considerations

RF layout significantly impacts amplifier performance:

• Ground vias: Multiple vias close to components minimize ground inductance
• Component placement: Minimize lead lengths; orient components to reduce coupling
• Transmission lines: Use controlled-impedance lines; account for discontinuities
• Shielding: Separate input and output to prevent oscillation; use ground fences if needed
• Thermal management: Provide adequate heat sinking for power dissipation

Test and Characterization

Essential measurements for RF amplifier verification:

• S-parameters: Vector network analyzer measures gain, return loss, and isolation versus frequency
• Noise figure: Y-factor method with calibrated noise source determines noise performance
• Compression point: Signal generator and power meter find P1dB
• Intermodulation: Two-tone test with spectrum analyzer measures IP3
• Stability: Sweep frequency and vary source/load impedances to verify no oscillation