Electronics Guide

Bandwidth Advantages

The bandwidth advantage of current-mode circuits stems from the low-impedance nodes through which the signal passes. When a current signal is conveyed through a low-impedance node, the voltage across any parasitic capacitance there remains small, and the RC time constant that the capacitance forms with the node resistance is short. Well-designed current-mode stages can therefore operate at a substantial fraction of the transistor's transition frequency f_T. The input node of a simple one-to-one MOS current mirror, for example, carries the gate capacitance of both transistors and is driven through the 1/g_m of the diode-connected one, which places its pole near f_T/2 before junction and wiring capacitances are added.

Consider a simple current transfer between two points. In a voltage-mode implementation, a buffer must charge the output node capacitance through its finite output impedance. In a current-mode implementation using a current conveyor, the input node is held at a fixed potential, often virtual ground, by the low-impedance input port, while the output current is delivered from a high-impedance source into the low-impedance input of the next stage, so that node, too, barely moves in voltage. The bandwidth is then set chiefly by the transistors' internal capacitances rather than by the external capacitance at each interface. The arrangement matters: a high-impedance current output left to drive a capacitive load directly forms a slow pole of its own, which is why current-mode stages are cascaded from high-impedance outputs into low-impedance inputs.

The advantage is not automatic. Every current-mode circuit still contains high-impedance nodes, at current-source outputs and at the internal transimpedance node of a current-feedback amplifier, so speed, noise, and dynamic range still have to be earned through topology, bias current, and device sizing rather than assumed from the label.

Dynamic Range Considerations

Logarithmic compression lets current-mode circuits handle signals spanning many decades. Because the base-emitter voltage of a bipolar transistor is logarithmic in its collector current over a wide range, a logarithmic converter built on transistor junctions can accept input currents of enormous span. Texas Instruments' LOG114, which takes the logarithm of two input currents with matched junctions in the feedback loops of its amplifiers, is specified over eight decades of input current, from 100 pA to 10 mA, a range of 160 dB.

Compression alone does not lower noise. The shot noise of a current I has a mean-square value i_n² = 2qIΔf in a bandwidth Δf, where q is the electron charge, so it grows with the current. In a class A circuit the bias current, and with it the noise floor, is fixed by the largest signal to be handled and stays put as the signal shrinks. Class AB and companding circuits let the bias, and with it the noise, fall when the signal is small, so their dynamic range, the ratio of the largest to the smallest signal handled, can exceed their peak signal-to-noise ratio. The class AB log-domain filter described below is a measured example.

First-Generation Current Conveyor (CCI)

The first-generation current conveyor (CCI) has three terminals: X, Y, and Z. The X terminal presents a low input impedance, while the Z terminal provides a high-impedance current output. The defining relationships are that the voltage at X follows the voltage at Y (V_X = V_Y), and the current into X is conveyed to the Z terminal (I_Z = I_X in the positive form). Crucially, in the CCI the current forced into the X terminal also flows into the Y terminal (I_Y = I_X): the Y terminal is therefore not a high-impedance node but carries the same current as X.

While the CCI provided the conceptual foundation for current-mode circuit design, its practical utility was limited precisely by this current flowing at the Y terminal, which complicated the realization of many functions because whatever drives Y must also supply the X current. The second-generation current conveyor addressed this limitation by making Y a true high-impedance input.

Second-Generation Current Conveyor (CCII)

The second-generation current conveyor (CCII), introduced by Sedra and Smith in 1970, modified the terminal relationships to provide more practical functionality. In the CCII, the X terminal voltage still follows the Y terminal (V_X = V_Y), but the Y terminal now presents ideally infinite impedance and draws no current (I_Y = 0). Only the current forced into the low-impedance X terminal is conveyed to the high-impedance Z output.

Like the CCI, the CCII comes in two polarities: CCII+ where I_Z = +I_X, and CCII- where I_Z = −I_X. This flexibility enables implementation of a wide variety of circuit functions. A CCII can be built from a voltage buffer between Y and X whose supply currents are copied to Z by complementary current mirrors, or from operational amplifiers configured appropriately. The AD844 current-feedback amplifier is internally a CCII+ followed by an output voltage buffer, and with its Z node brought out to a pin it can serve as a stand-alone conveyor. CMOS conveyor designs with bandwidths beyond 100 MHz have been published since the mid-1990s.

The CCII enables remarkably simple implementations of many common circuit functions. A current amplifier requires only a CCII with appropriate resistor ratios. Voltage amplifiers, integrators, differentiators, and filters can all be constructed using CCIIs, frequently with fewer components than equivalent op-amp implementations and with better high-frequency performance.

Third-Generation and Beyond

Alain Fabre proposed the third-generation current conveyor (CCIII) in 1995. It keeps V_X = V_Y and I_Z = ±I_X, but reverses the Y current of the CCI, so that I_Y = −I_X: the current that enters X leaves through Y. The X–Y port can therefore be inserted in series with a branch of a circuit, ideally without adding any voltage drop since V_X = V_Y, while Z delivers a copy of the branch current, and Fabre presented the device as a floating current sensor. He also gave a class AB realization built from two CCIIs.

Beyond the three generations, a large family of variants has been built around the CCII. The second-generation current-controlled conveyor (CCCII), described by Fabre and colleagues in 1996, turns a parasitic into a design parameter: the series resistance R_X at the X terminal is set by a bias current. In a bipolar realization based on a mixed translinear loop, R_X = V_T/(2I₀), where V_T is the thermal voltage and I₀ the bias current, so CCCIIs can realize current-controlled amplifiers and, with capacitors alone, electronically tunable filters that need no resistors. The differential voltage current conveyor (DVCC), described by Elwan and Soliman in 1997, splits the Y input in two so that V_X = V_Y1 − V_Y2, which suits differential and floating inputs such as current-mode instrumentation amplifiers. Dual- and multiple-output conveyors supply several copies of the Z current, of either sign, from one device.

These advanced current conveyors enable more sophisticated signal processing functions while keeping the bandwidth of current-mode operation. Many analog integrated circuits incorporate current conveyor principles in their internal architectures even when presenting traditional voltage-mode interfaces to the user; the current-feedback amplifier is a familiar example.

Operating Principles

The current-feedback amplifier topology employs a low-impedance inverting input that senses current rather than voltage. The noninverting input presents high impedance like a conventional op-amp, but the inverting input is the output of an internal unity-gain buffer, typically the emitters of a complementary transistor pair, and presents an impedance of only a few tens of ohms. When the inverting input sources or sinks current through the feedback network, this current is mirrored to a high-impedance internal node and converted to the output voltage by the amplifier's large transimpedance.

The closed-loop gain of a current-feedback amplifier in the noninverting configuration is approximately 1 + R_F/R_G (or −R_F/R_G when configured as an inverter), where R_F is the feedback resistor and R_G is the gain-setting resistor. Critically, the closed-loop bandwidth depends primarily on R_F, not on the gain set by R_G. If the transimpedance stage is modeled as a large resistance in parallel with a capacitance C_T at the internal high-impedance node, the closed-loop bandwidth is approximately:

f_{3 dB} ≈ 1/(2πR_FC_T)

The gain-setting resistor does not appear: increasing the gain by lowering R_G leaves the dominant time constant, R_FC_T, unchanged to first order. The decoupling is not perfect. The input buffer's output resistance R_I, about 35 Ω in Texas Instruments' OPA691, adds a term R_I(1 + R_F/R_G) to R_F in this expression, so the bandwidth falls gradually as the gain rises, and data sheets recommend a smaller R_F at high gain to compensate. Even so, this near-independence of gain and bandwidth is the defining advantage of the CFA over the conventional voltage-feedback amplifier, whose gain-bandwidth product is constant.

Design Considerations

While current-feedback amplifiers offer exceptional bandwidth performance, their design requires attention to several unique considerations. The feedback resistor value is critical: too small a value can cause peaking and instability, while too large a value reduces bandwidth. Manufacturers specify optimal feedback resistor values for each supply voltage and gain, and a CFA used as a unity-gain follower still needs its feedback resistor rather than a direct connection from output to inverting input.

The low-impedance inverting input has implications for circuit design. Capacitance directly on the inverting input, whether from circuit traces or intentional compensation, can cause instability. Unlike voltage-feedback amplifiers, where input capacitance merely reduces bandwidth, input capacitance on a CFA inverting input can cause peaking or oscillation. Careful layout with minimal trace length to the inverting input is essential.

Current-feedback amplifiers also exhibit different noise characteristics than voltage-feedback types. The input current noise is typically higher because of the low-impedance input stage, making CFAs less suitable for high-impedance source applications. However, their slew rate and bandwidth make them excellent choices for driving cables, ADC inputs, and other applications requiring fast settling.

The Translinear Principle

The translinear principle states that in any closed loop of bipolar transistor base-emitter junctions, arranged with an equal number of junctions facing each direction around the loop, the product of current densities in the clockwise devices equals the product of current densities in the counterclockwise devices. For transistors with equal emitter areas, this simplifies to the product of the clockwise collector currents equaling the product of the counterclockwise collector currents.

Mathematically, if transistors Q1 and Q2 are oriented clockwise in a loop while Q3 and Q4 are oriented counterclockwise, then I_C1 · I_C2 = I_C3 · I_C4. This relationship holds because the sum of base-emitter voltages around the loop must be zero, and the exponential V_BE–I_C relationship transforms this voltage constraint into a current-product constraint.

The elegance of the translinear principle is that it depends only on the exponential characteristic of the transistors, not on absolute values of parameters like the saturation current. The thermal voltage cancels from the loop equation, so the current relationship is, to first order, independent of temperature, provided the loop is isothermal. Process variations that shift every device alike cancel in the same way, leaving mismatch between nominally identical devices, in emitter area and saturation current, as the main source of error.

Translinear Multipliers

The four-quadrant analog multiplier is perhaps the most important application of translinear principles. The Gilbert cell, widely used in communications systems for mixing and modulation, implements multiplication using cross-coupled differential pairs arranged in a translinear configuration. For input voltages V₁ and V₂, a tail current I_EE, and thermal voltage V_T, the differential output current is:

ΔI = I_EE tanh[V₁/(2V_T)] tanh[V₂/(2V_T)]

The output is proportional to the product V₁V₂ when both inputs are small compared with 2V_T, about 52 mV at room temperature. Predistortion at the inputs, which converts each input to a current and back through diode-connected transistors, removes the tanh nonlinearity so that the cell multiplies two input currents accurately over a much wider range. Operation is four-quadrant: either input, and the output, can be positive or negative.

Precision depends chiefly on transistor matching, as Gilbert showed in his 1968 paper on the multiplier, and laser-trimmed precision multipliers built on the Gilbert cell achieve multiplication accuracies better than 1% of full scale. Gilbert described his original multiplier as useful from DC to frequencies very close to the transistor f_T, and the Gilbert cell has since become the dominant integrated mixer topology in radio receivers and transmitters. Variations of the basic Gilbert cell implement variable-gain amplifiers, mixers, modulators, and phase detectors, all exploiting the fundamental translinear multiplication operation.

Geometric Mean and RMS Computation

Translinear circuits excel at computing mathematical functions that would otherwise require complex algorithms in digital systems. The geometric mean of two currents emerges naturally from a simple translinear loop: if I_C1 · I_C2 = I_C3 · I_C4 and the loop is arranged so that I_C3 = I_C4 = I_OUT, then I_OUT = √(I_C1 · I_C2), the geometric mean of the two input currents.

RMS (root mean square) computation extends this principle. A translinear squaring circuit followed by averaging and a square-root circuit computes true RMS values for arbitrary waveforms, but squaring doubles the signal's dynamic range in decibels. A translinear circuit can instead compute the RMS value implicitly: a squarer/divider forms I_IN²/I_RMS, a low-pass filter averages the result, and feeding the filter output back to the divider as I_RMS makes it settle at the RMS value of I_IN. These RMS-to-DC converters, treated in Analog Computation Circuits, are essential for accurate AC measurements and are found in precision multimeters and power measurement instruments. Within their bandwidth and crest-factor limits, their accuracy is independent of waveform shape, so they measure the true power content of complex signals.

Companding Principle

Log-domain filters employ compression at the input and expansion at the output, a technique borrowed from telecommunications called companding. The input current is logarithmically compressed as it enters the filter, processed in the compressed domain, and then exponentially expanded to recover the output. Because the compression and expansion are precisely matched through the translinear loop principle, the overall transfer function remains linear despite the internal nonlinear representation.

The advantage of this approach is that internal signal swings are dramatically reduced. Because a bipolar base-emitter voltage changes by only about 60 mV per decade of collector current at room temperature, a signal spanning 60 dB of dynamic range (a 1000:1, three-decade current ratio) compresses to roughly 180 mV of internal voltage swing when represented logarithmically. A small, logarithmically bounded swing suits low supply voltages, where a linear circuit would have to accommodate the full 1000:1 range directly.

Log-Domain Integrators and Filters

The fundamental building block of log-domain filtering is the log-domain integrator. Like any continuous-time integrator it charges a capacitor with a current, but the capacitor voltage represents the logarithm of the state current, and the exponential law of the transistors that read it converts the result back to a current. For the basic lossy integrator the time constant is:

τ = CV_T/I₀

where C is the integrating capacitance, V_T is the thermal voltage, about 26 mV at room temperature, and I₀ is a bias current. The time constant is therefore set by a bias current rather than by a resistor, which allows electronic tuning.

Complete filters are constructed by interconnecting log-domain integrators according to standard filter synthesis techniques, such as the operational simulation of LC ladders, and state-variable and other topologies all have log-domain equivalents that provide the same transfer functions. Measured log-domain filters have reached very high frequencies: Frey reported an electronically tunable second-order filter operating beyond 400 MHz with a Q above 60 in 1996, and El-Gamal and Roberts a 220 MHz biquad and a 130 MHz fourth-order bandpass filter in 1998. Dynamic range has been demonstrated separately, in lower-frequency designs: Frey's 1993 simulation of a seventh-order Chebyshev lowpass filter with a cutoff near 5 MHz showed nearly 60 dB relative to 0.9 percent total harmonic distortion, and the class AB filter described below measured 65 dB.

The electronically tunable nature of log-domain filters makes them attractive for applications requiring adaptive filtering or wide tuning ranges. Because the pole frequencies follow the bias currents, published designs tune over two to three decades without changing components; Punzenberger and Enz's 1997 class AB filter, for example, has a nominal cutoff of 320 kHz at a bias current of 1 µA and tunes over almost three decades, up to about 10 MHz. That range, and operation from supplies near 1 V, suit both tunable RF filters and low-voltage, low-power audio filters.

Class AB Log-Domain Circuits

A class A log-domain circuit needs a bias current larger than the largest signal current, which wastes power when signals are small and limits large-signal operation. Class AB log-domain circuits, already proposed in Seevinck's 1990 companding integrator, address these limitations by using push-pull current structures that can handle signals larger than the quiescent bias current.

In class AB operation, two complementary signal paths handle positive and negative excursions of the signal current. Each path operates in class A individually, but the composite structure provides class AB operation where the total current can greatly exceed the quiescent current. This approach improves power efficiency and enables log-domain processing of large signals without excessive power consumption. It also changes the noise behavior: in Punzenberger and Enz's 1.2 V BiCMOS class AB filter, the measured signal-to-noise ratio saturated at 52.5 dB, yet the dynamic range at 1 percent total harmonic distortion was 65 dB, because the noise, like the currents, falls when the signal is small.

Gm-C Filters

Transconductance-capacitor (Gm-C) filters represent a bridge between voltage and current modes. A transconductance amplifier (transconductor) converts an input voltage to an output current; when its output current charges a capacitor, the result is an integrator, and interconnected integrators form complete filters. The unity-gain frequency of a Gm-C integrator is set by the ratio G_m/C:

f_u = G_m/(2πC)

where G_m is the transconductance and C the integrating capacitance; a transconductance of 100 µS driving 1 pF, for example, gives about 16 MHz. Varying the transconductance through bias-current adjustment therefore tunes the filter electronically across a wide frequency range without changing component values.

Modern Gm-C filters achieve operating frequencies from kilohertz to hundreds of megahertz, with applications in disk drive read channels, communications systems, and sensor interfaces. The transconductors can be implemented using differential pairs, current conveyors, or more sophisticated structures optimized for linearity. Because G_m and C each vary by tens of percent with process and temperature, integrated Gm-C filters usually include an automatic tuning loop that locks a replica integrator to a reference frequency; the close matching between integrators on one die then keeps the shape of the response accurate.

Current-Mirror-Based Filters

Filters can be constructed entirely from current mirrors and capacitors, avoiding the need for resistors entirely. These current-mirror-based filters are particularly attractive for integrated circuit implementation where accurate resistors are difficult to fabricate. The frequency response depends on current ratios and capacitor values, both of which can be accurately controlled in integrated processes.

Basic building blocks include current amplifiers, current integrators, and current differentiators. Integration arises naturally because forcing a current onto a grounded capacitor produces a node voltage equal to the time integral of that current; a current mirror or transconductor then converts the result back into an output current for the next stage. Differentiation is realized by the dual arrangement, in which a capacitor passes a current proportional to the rate of change of an applied voltage. By interconnecting these blocks according to standard synthesis techniques, complete filter transfer functions can be realized using only transistors and capacitors.

Basic Mirror Topologies

The simple two-transistor current mirror copies the input current to the output with an accuracy limited by transistor matching and by the Early effect, or channel-length modulation, which makes the output current depend on the output voltage. In bipolar mirrors the base currents add a systematic error: with a finite current gain β, the simple mirror's output falls short of its input by a fraction of about 2/β, roughly 2 percent at β = 100. In MOS mirrors, which draw no gate current, threshold-voltage mismatch and channel-length modulation are the primary error sources.

The Wilson mirror adds a third transistor in a negative-feedback loop that senses the output current and corrects it, raising the output impedance and, in the bipolar version, cutting the base-current error to about 2/β²; the improved Wilson mirror adds a fourth, diode-connected transistor that equalizes the voltages across the matched pair. Cascode mirrors reach a similar output impedance by shielding the mirror transistor from output voltage changes instead. These enhanced topologies raise output impedances into the megohms and remove most systematic error, leaving random mismatch between the matched devices as the main limit on accuracy.

Wide-Swing and High-Speed Mirrors

High-performance current-mode systems require mirrors that combine high output impedance with wide output voltage compliance and high bandwidth. Wide-swing cascode mirrors achieve high impedance while allowing output swings within a few hundred millivolts of the supply rails. Regulated cascode mirrors use a local feedback amplifier to hold the mirror transistor's drain voltage constant, multiplying the cascode's output impedance by roughly the gain of that amplifier.

Bandwidth optimization in current mirrors involves careful attention to the capacitances at internal nodes. The dominant pole typically occurs at the input node, where the input current must charge the gate or base capacitances of the mirror transistors. High-speed mirrors often incorporate local feedback or compensation techniques to extend bandwidth while maintaining stability.

Current Memory Cells

Current memory cells, also called current copiers or dynamic current mirrors, sample and hold a current for later use. The basic concept stores the controlling voltage of a current source on a capacitor, usually the transistor's own gate capacitance, then disconnects the input while maintaining the output current. These cells are the storage element of switched-current circuits, the current-mode counterpart of switched-capacitor circuits; because a switched-current circuit holds its signal on a transistor's gate capacitance, it needs no linear capacitors and suits standard digital CMOS processes. Current memory cells also serve in current-mode sample-and-hold stages and data converters, and in calibration: a 16-bit DAC described by Groeneveld and colleagues in 1989 kept its current sources accurate by refreshing each from a reference current stored in this way.

The first switched-current cells reproduced the stored current through a second, mirroring transistor, so any mismatch between the two transistors appeared directly as error. The second-generation cell, described by Hughes and colleagues in 1990, uses a single transistor both to sample the input and to deliver the output, which makes it insensitive to that mismatch. Charge injection and clock feedthrough from the sampling switch remain, and the S²I technique of Hughes and Moulding (1993) attacks them in two steps: a coarse memory first stores the input together with all of its errors, and a fine memory then samples and cancels most of the combined error, at the cost of only a few extra switches. Regulated-cascode output stages further raise the cell output impedance so that the held current is insensitive to output voltage. With such refinements, switched-current circuits reached the roughly 10-bit precision of the converters described below.

Current-Mode DACs

Many digital-to-analog converters use current-mode architectures, even when presenting voltage outputs. Binary-weighted current sources are switched according to the digital input, and the sum of selected currents is converted to voltage through a transimpedance amplifier or resistor. This architecture is particularly well suited to segmented implementations, in which the most significant bits use thermometer coding for improved linearity.

The current-steering DAC is a highly successful current-mode topology. Each current source is switched by a differential transistor pair to either the output or a complementary output or dummy load, so the sources run continuously and are merely redirected; switching glitches are reduced and settling is fast. Current-steering DACs with sampling rates exceeding 10 GS/s have been demonstrated, making them essential for high-speed communications and signal generation.

Current-Mode ADCs

Analog-to-digital converters can also be built in the current domain. Algorithmic, or cyclic, converters store and recirculate the residue in current memory cells, giving compact converters of moderate resolution, and a successive-approximation converter can compare the input current with the output of a current DAC, although most successive-approximation converters use a capacitive, charge-redistribution DAC instead.

Pipelined converters have been built the same way, with each stage's residue formed and amplified as a current by switched-current circuits. Macq and Jespers's 1994 pipelined switched-current converter, for example, held integral nonlinearity below 0.8 LSB at 10-bit resolution, though at only 550 kS/s. Mainstream pipeline converters instead use switched-capacitor residue amplifiers, whose gain is set by an accurate capacitor ratio.

Push-Pull Current Structures

Class AB current processing typically employs complementary NMOS and PMOS (or NPN and PNP) transistor pairs that share the signal current. For small signals near zero, both transistors conduct approximately equal quiescent currents. As the signal increases positively, the sourcing transistor conducts more while the sinking transistor conducts less, with the signal current being the difference. The reverse occurs for negative signals.

The key challenge in class AB current-mode design is maintaining the relationship between the two transistor currents such that their difference accurately represents the signal. Various techniques have been developed, including translinear loops that hold the product of the sourcing and sinking currents constant, I_P · I_N = I_Q², where I_Q is the quiescent current, so that neither current ever falls to zero, and local feedback structures that sense and correct deviations from the desired operating point.

Class AB Current Mirrors and Conveyors

Class AB current mirrors extend the operating range of basic current mirrors to handle bidirectional currents larger than the quiescent bias. A common approach uses a minimum-current selector that senses the lesser of the two complementary transistor currents and holds it at a defined floor, ensuring that at least one transistor always conducts regardless of signal polarity. More sophisticated structures achieve smoother transitions between sourcing and sinking modes.

Class AB current conveyors combine the versatility of the current conveyor architecture with the large-signal handling capability of class AB operation. They suit current-mode systems that must handle signals of wide dynamic range without excessive power consumption, processing signal currents many times larger than the quiescent current.

Communications Systems

RF and wireless communications use current-mode circuits extensively, chiefly for their high-frequency performance. Gilbert-cell mixers implement frequency conversion in receivers and transmitters. Current-mode variable-gain amplifiers provide automatic gain control with wide tuning range. Current-steering DACs generate high-frequency signals for direct digital synthesis and communications transmitters.

Sensor Interfaces

Many sensors naturally produce current outputs, making current-mode processing a natural fit. Photodiodes generate currents proportional to incident light, and current-output temperature sensors source a current proportional to absolute temperature; processing such signals as currents avoids converting them to voltages first. Logarithmic and log-ratio converters built on the exponential junction law measure photodiode currents over many decades, and translinear circuits enable precise ratiometric measurements that are insensitive to absolute scale factors.

Neural and Biological Systems

Current-mode circuits are widely used in neuromorphic engineering, a field Carver Mead named in the late 1980s, whose goal is to emulate biological neural processing. MOS transistors operated in subthreshold follow an exponential law like that of a bipolar junction, and a logarithmic photoreceptor built on that law compresses light intensity spanning many decades much as a biological photoreceptor does; it is the input stage of the silicon retina. Current-mode computation naturally implements the summation of synaptic inputs, since currents add at a node by Kirchhoff's current law, and bias currents of picoamperes to nanoamperes let large neural arrays run within practical power budgets.