Analog Integrated Circuit Design
Analog integrated circuit design is the practice of implementing continuous-signal functions within the constraints of a semiconductor fabrication process. Unlike discrete design, where a component can be chosen from a vast catalog of values and tolerances, the IC designer works with whatever the process provides and shapes performance through circuit topology rather than part selection. Absolute resistor and capacitor values may vary by tens of percent across wafers and temperature, yet the relationships between devices placed side by side on the same die are remarkably tight. Much of the discipline consists of building functions that depend on these ratios rather than on absolute values.
That shift turns several of the medium's apparent weaknesses into strengths. Adjacent transistors fabricated together match closely and share a common temperature, so a designer can create accurate current and voltage ratios, cancel first-order errors through symmetry, and let nearby devices track one another over temperature and supply. From the current mirrors that distribute bias throughout a chip to the bandgap references that hold a voltage steady against temperature, these techniques underpin nearly every modern analog and mixed-signal system, including the amplifiers, data converters, and power-management blocks that interface the digital world to the physical one.
This category organizes the subject from the silicon upward. The first subcategory covers the device physics and process technology that set the rules of the medium. The next two treat the two bias primitives that appear in almost every analog chip: the current mirror, which copies and distributes current, and the bandgap reference, which fixes a temperature-stable voltage. The fourth turns to physical layout, where matching, parasitics, and reliability are won or lost. Read together, they trace the path from a process specification to a working, manufacturable analog integrated circuit.
Analog Integrated Circuit Design Topics
Analog VLSI Fundamentals
Establish the device-level foundation on which every analog IC is built. Coverage includes MOS and bipolar device physics and the small-signal parameters that govern gain and bandwidth, the operating regions from weak inversion through saturation, and the way modern processes blend analog, digital, and power devices. It also addresses process technology and design rules, the device matching that ratio-based design depends on, and design for manufacturability, so that a circuit performs not only in simulation but across the spread of a real production line.
Current Mirrors and Bias Circuits
Generate and distribute the bias currents that set every amplifier's operating point. A current mirror exploits the close matching of two adjacent transistors so that a current forced into one is reproduced in the other, with the copy scaled by a deliberate device-size ratio. Topics include the simple two-transistor mirror and its limitations, cascode and Wilson structures that raise output impedance and accuracy, and supply-independent and temperature-compensated bias cells. Because a single reference current can fan out to dozens of stages, the mirror is the workhorse that ties an analog chip's bias network together.
Bandgap References and Voltage Biasing
Produce a stable on-chip voltage that holds steady as temperature, supply, and process vary. The bandgap reference sums a voltage that falls with temperature, a transistor's base-emitter voltage, with a proportional-to-absolute-temperature term derived from the difference between two junctions, yielding an output near the silicon bandgap of roughly 1.2 volts whose first-order temperature dependence cancels. Coverage extends to PTAT and CTAT generation, curvature compensation for tighter accuracy over a wide range, low-voltage and sub-bandgap architectures, and the trimming and calibration that remove residual offset.
Analog Layout Techniques
Translate a working schematic into silicon without sacrificing the matching and accuracy the design assumes. Because absolute device values are loose but relative ones are precise, layout is where performance is preserved or lost. Topics include common-centroid and interdigitated placement that cancel process gradients, dummy devices that equalize the surroundings of matched elements, careful control of parasitic capacitance and resistance, thermal placement that keeps sensitive devices away from heat sources, and reliability concerns such as electromigration, antenna effects, and latch-up. Good layout is what lets a matched pair on paper stay matched on the die.
Themes Across Analog IC Design
The four subcategories address different layers of the design, yet a handful of ideas recur throughout the discipline and distinguish it from board-level analog work.
Ratios beat absolutes. Process variation makes any single resistance, capacitance, or threshold voltage uncertain by tens of percent, but the ratio of two like devices built together can hold to a fraction of a percent. Successful topologies, current mirrors, bandgap references, switched-capacitor filters, lean on this fact, encoding the wanted result as a ratio of matched elements rather than as an absolute value the process cannot guarantee.
Matching and symmetry cancel errors. Placing devices identically and symmetrically causes their individual imperfections to subtract rather than add. Differential signaling rejects common-mode disturbances, common-centroid layout cancels linear gradients across the die, and matched pairs track over temperature. Mismatch that remains is statistical: as captured by Pelgrom's law, the standard deviation of mismatch between two devices scales inversely with the square root of their area, so accuracy is bought with silicon.
Bias defines behavior. An analog circuit's gain, bandwidth, noise, and linearity all follow from its operating point. Currents and voltages cannot simply be applied from outside, as on a breadboard; they must be generated on-chip and distributed with mirrors and references that hold steady against supply and temperature. The bias network is therefore not an afterthought but a primary determinant of how the whole chip performs.
Layout is part of the circuit. In an integrated circuit the wiring, the substrate, and the proximity of neighboring devices are not parasitic details to be added later; they shape the result. Parasitic capacitance loads high-impedance nodes, shared substrate couples noise, and thermal gradients unbalance matched pairs. A design is not finished when the schematic simulates well, only when its physical implementation preserves that behavior.
Design for the whole distribution. A chip must work not for one nominal set of conditions but across process corners, temperature, supply tolerance, and unit-to-unit variation, for every part shipped. Designers verify across corners and with Monte Carlo analysis, build in margin, and add trimming or calibration where matching alone cannot meet the specification. Yield, not a single passing simulation, is the measure of success.
Related Topics
- Operational Amplifiers and Linear Circuits - The most common building block assembled from the mirrors, references, and matched pairs covered here.
- Analog-to-Digital and Digital-to-Analog Conversion - Data converters whose accuracy rests directly on device matching, references, and careful layout.
- Mixed-Signal Interface Circuits - The on-chip boundary where analog blocks meet digital logic, sharing substrate, supplies, and process.
- Calibration and Trimming - The techniques that remove the residual offset and mismatch that matching alone cannot eliminate.
- Analog Modeling and Simulation - The device models and corner and Monte Carlo analyses used to verify an IC across process and temperature.
- Analog Electronics - The parent field whose principles analog integration both constrains and extends.
Conclusion
Analog integrated circuit design shows how a medium that offers poor absolute precision can deliver excellent relative precision in the hands of a designer who builds with ratios, symmetry, and matched devices. Process and device physics set the rules, current mirrors and bandgap references provide the bias that defines every stage, and layout decides whether the silicon honors the schematic. The subcategories above develop each of these in detail, and the related topics place them within the larger practice of building accurate, manufacturable analog and mixed-signal systems.