Power Management
Power management determines how effectively an embedded system converts, distributes, and spends electrical energy. It spans the components that generate supply rails, the circuits that protect and sequence them, the processor modes that trade activity for current, and the firmware that decides when to use each. The consequences reach well beyond the power supply itself: a battery-operated sensor lives or dies on its average current, a fanless gateway is limited by how much heat its enclosure can shed, and a medical or automotive device must prove that its rails behave correctly during brownouts and faults.
The design space is unusually wide. The same discipline covers a metering node that must survive ten years on a single primary cell drawing an average of a few microamperes, and an edge compute module that draws tens of watts and throttles itself to stay within a thermal envelope. What unites them is a common method: account for every microampere and every joule, choose conversion and storage technologies that match the load profile, and place the system in the lowest-power state consistent with its obligations. The topics in this category examine each part of that method in detail.
Articles in This Category
Where the Energy Goes
Every power management decision rests on an accurate account of consumption. Building that account means separating the mechanisms that consume power, then weighting each by how much time the system actually spends in it.
Dynamic and Static Power
Digital CMOS logic dissipates dynamic power in proportion to the activity factor, the switched capacitance, the square of the supply voltage, and the clock frequency. The quadratic dependence on voltage is the single most important lever in low-power design, and it is the reason voltage scaling outperforms frequency reduction alone: halving the clock halves the dynamic power but takes twice as long to finish the same work, leaving the energy per operation roughly unchanged, whereas lowering the supply voltage reduces the energy of every transition.
Static power tells the opposite story. Leakage current flows whenever the transistors are powered, whether or not they switch, and it rises sharply with temperature and with process scaling. In a device that spends most of its life idle, leakage rather than switching sets the energy budget, which is why deep sleep modes remove power from unused blocks entirely rather than merely stopping their clocks. Analog blocks, voltage references, brownout detectors, and always-on real-time clocks add their own quiescent current, and on a microampere-scale budget these fixed costs often dominate.
Duty Cycling and the Average-Current Budget
Most battery-powered embedded systems are not low-power so much as rarely active. A wireless sensor might wake once per minute, sample for ten milliseconds at two milliamperes, transmit for five milliseconds at fifteen milliamperes, and sleep at one microampere for the remainder. The average current is the time-weighted sum of those phases, and in this example the sleep state and the radio burst contribute comparably. Two conclusions follow directly. The active-phase contribution is a product of current and time, so a wake window that runs longer than necessary costs exactly as much as a current that runs higher than necessary, and the former is usually the more compressible of the two, since peak radio current is fixed by the transmitter while settling delays and inefficient wake sequences are not. The sleep current, meanwhile, sets a floor beneath which no amount of active-phase optimization can push the average.
This arithmetic also explains the practice known as race to idle. Where a processor has a genuinely low-power sleep state, completing a task quickly at a higher clock and returning to sleep often consumes less total energy than running slowly for longer, because the fixed overhead of being awake, including leakage, regulators, oscillators, and memory retention, is paid for less time. Where the sleep state is not much cheaper than the idle state, the opposite holds and slow, steady execution wins. Measuring the actual platform settles the question; general rules do not.
The Power Delivery Network
The power delivery network transforms whatever source is available into the set of stable rails the system requires. A modern embedded board commonly carries several: a core logic rail somewhere between roughly 0.8 V and 1.8 V depending on the process node, a 3.3 V or 1.8 V input/output rail, dedicated supplies for memory, and separately filtered rails for analog front ends, radios, and sensors. Each stage in the chain trades efficiency against noise, size, cost, and transient response.
Sources and Input Conditioning
Input sources vary widely, and each imposes its own conditioning requirements. Industrial equipment typically runs from a 24 V direct-current field supply, automotive electronics from a nominal 12 V battery that must survive load-dump and cold-crank excursions far outside that value, and portable devices from a single lithium cell whose terminal voltage sags across its discharge curve. Powered network equipment may draw from the Ethernet cable itself; IEEE 802.3bt extends Power over Ethernet to roughly 90 W at the sourcing port, using all four pairs. USB-C has become a common source as well: Extended Power Range, introduced in USB Power Delivery Revision 3.1 and carried into Revision 3.2, adds 28 V, 36 V, and 48 V fixed levels and raises the ceiling to 240 W at 48 V and 5 A, with an adjustable voltage supply mode that negotiates in 100 mV steps above 15 V.
Whatever the source, the input stage normally provides reverse-polarity protection, transient suppression, inrush limiting, and filtering before the first conversion stage. Skipping these is a common cause of field failures that never appear on the bench, because bench supplies are clean and field supplies are not. Broader treatment of conversion topologies and devices belongs to power electronics.
Linear Regulators and Low-Dropout Devices
A linear regulator passes current through a controlled series element and dissipates the voltage difference as heat. Its efficiency is therefore bounded by the ratio of output to input voltage, ignoring quiescent current: dropping 5 V to 3.3 V wastes about a third of the input energy, and dropping 12 V to 3.3 V wastes nearly three-quarters. That penalty is acceptable when the current is small or the ratio is close, and the compensation is real: linear regulators are quiet, compact, cheap, and free of switching artifacts.
Low-dropout regulators extend the approach to small input-to-output differences, often a few hundred millivolts or less at rated current. They are the usual choice for post-regulating a switching converter to feed an analog-to-digital converter, an oscillator, or a radio, where the relevant figure of merit is power supply rejection ratio across the switching converter's fundamental and harmonics rather than efficiency. For always-on rails, quiescent current matters more than either; devices intended for battery systems specify quiescent currents in the range of a few hundred nanoamperes to a few microamperes.
Switching Converters
Switching converters transfer energy in packets through an inductor or capacitor rather than dissipating the difference, which allows efficiencies commonly above 90 percent across a broad load range. Buck converters step voltage down, boost converters step it up, and buck-boost topologies handle inputs that cross the output, an unavoidable requirement when a lithium cell discharges from above to below a 3.3 V rail. Isolated topologies such as flyback and forward converters add galvanic separation where safety standards or ground-loop considerations demand it.
Light-load behavior deserves particular attention in embedded designs. A converter optimized for full load may become badly inefficient at the microampere currents of a sleeping system, because gate drive, control circuitry, and switching losses continue regardless of throughput. Pulse-frequency modulation, burst, or skip modes address this by firing the switch only often enough to hold the output in regulation, trading a small increase in output ripple and a variable switching spectrum for greatly improved light-load efficiency. Selecting a converter therefore means examining its efficiency curve at the currents the product will actually spend its time at, not only at the rated maximum.
Rails, Sequencing, and Supervision
Multi-rail systems must be brought up and taken down in a defined order. Applying an input/output supply before the core supply can forward-bias parasitic structures and drive current through electrostatic-discharge protection diodes, which risks latch-up and, in the milder case, an indeterminate reset state. Vendor datasheets specify the permitted rail order and any timing constraints between rails, and the design must enforce them with sequencing logic, enable-chaining, or a dedicated controller.
Supervisory circuits complete the picture. A brownout detector or voltage supervisor holds the processor in reset until the supply is valid and asserts reset again if it falls out of range, preventing the erratic behavior that partially powered logic produces. Power management integrated circuits combine several converters with sequencing, supervision, current limiting, and a register interface in one package, which shrinks the board and reduces the number of discrete timing relationships the designer must verify, at the cost of committing early to a fixed rail architecture.
Power States and Runtime Management
Hardware provides the mechanisms for saving power; firmware decides when to use them. The quality of that decision-making usually separates a design that meets its battery target from one that misses it by an order of magnitude.
The Mode Hierarchy
Microcontrollers typically expose a graded set of modes. A sleep mode stops the processor clock while peripherals continue, allowing an interrupt to resume execution in microseconds with all state intact. Deeper stop modes halt most clocks and place regulators in a low-power configuration while retaining the contents of static RAM and register state. The deepest modes, variously named standby, shutdown, or system off, remove power from nearly everything, retaining only a real-time clock, a few backup registers, and the logic needed to detect a wake event; resumption from these is effectively a reset, and the firmware must restore its context from non-volatile storage.
The current spread across this hierarchy is dramatic. A current-generation ultra-low-power microcontroller such as the STMicroelectronics STM32U5 series specifies shutdown-mode consumption on the order of a hundred nanoamperes, while retention modes that preserve RAM cost more, scaling with how much RAM is kept alive, and wireless system-on-chip devices typically specify system-off currents well below one microampere. Choosing among the modes is a matter of matching wake-up latency and retained state against current: the deepest mode is not the best mode if restoring context after every wake costs more energy than the mode saved.
Voltage and Frequency Scaling
Dynamic voltage and frequency scaling adjusts the operating point to the workload rather than running continuously at the maximum. Because a lower clock permits a lower supply voltage and dynamic energy falls with the square of that voltage, the combined effect is substantially better than frequency reduction alone. Application-class processors expose several performance states and switch between them under scheduler control; microcontrollers more often provide a small number of discrete voltage scaling ranges, each with a maximum permitted clock frequency and its own flash wait-state requirements.
Transitions are not free. Changing a voltage regulator setpoint takes time to settle, a phase-locked loop takes time to relock, and both consume energy while the processor makes no progress. Effective governors therefore include hysteresis and minimum residency requirements, so that the system does not oscillate between states and lose more to transitions than it gains from the lower operating point.
Software Interfaces and Policy
On larger systems, standardized interfaces separate the power policy from the hardware detail. Arm's Power State Coordination Interface defines a firmware-level contract for processor idle, hotplug, suspend, and reset, and the System Control and Management Interface adds protocols for clock, power domain, performance, and sensor management handled by a system control processor. Linux builds its cpuidle and cpufreq subsystems on these, and energy-aware scheduling uses per-core energy models to place tasks on the cores where they cost least.
Smaller systems achieve the same end more directly. A tickless idle configuration in a real-time operating system suppresses the periodic timer interrupt when no task is ready, programs a wake-up timer for the next deadline, and enters a low-power mode until then, eliminating thousands of pointless wake-ups per second. Peripheral autonomy contributes as much: direct memory access, hardware timers driving conversions, sensor first-in-first-out buffers that accumulate samples, and event routing between peripherals all let useful work proceed while the processor core remains asleep.
Sources, Storage, and Harvesting
Where the energy comes from shapes everything downstream, from the converter topology to the firmware's notion of how much budget remains.
Primary and Secondary Cells
Primary, non-rechargeable cells suit devices that must run unattended for years without service. Lithium thionyl chloride cells are the usual choice for metering and remote monitoring: they offer a nominal 3.6 V with an exceptionally flat discharge plateau, very high energy density, and self-discharge on the order of one percent per year, which makes decade-long deployments feasible. Their limitation is a comparatively high internal impedance and a passivation layer that must be broken before the cell will deliver current, so designs with pulsed radio loads commonly pair them with a hybrid layer capacitor or supercapacitor that supplies the peak while the cell supplies the average. Coin cells such as the ubiquitous CR2032 hold only a couple of hundred milliampere-hours and sag sharply under pulse loads, especially in the cold, which constrains what a design can attempt on one.
Rechargeable chemistries trade calendar life for reusability. Lithium-ion and lithium-polymer cells sit near 3.6 V to 3.7 V nominal with a sloping discharge curve that supports state-of-charge estimation, while lithium iron phosphate cells operate near 3.2 V with a flatter curve, better thermal stability, and longer cycle life at lower energy density. Every lithium chemistry requires protection against overcharge, overdischarge, overcurrent, and out-of-range temperature, along with the charging and gauging functions covered in battery management systems and the hazard analysis covered under battery safety.
Energy Harvesting
Harvesting replaces or supplements a battery with ambient energy, and the achievable power is modest enough that it dictates the entire system design rather than merely informing it. Outdoor photovoltaic cells work with roughly 100 mW/cm2 of full-sun irradiance and deliver a useful fraction of it, but indoor cells under office lighting typically yield only tens of microwatts per square centimeter. Thermoelectric generators produce a similar order of magnitude at the small temperature differences available in practice, vibration harvesters depend heavily on whether the source is human motion or industrial machinery, and ambient radio-frequency energy from distant transmitters is smaller still, which is why deliberate wireless power transfer to a nearby receiver is a different proposition from scavenging.
Because these levels sit far below the peak demand of even a modest radio transmission, harvesting systems are almost always accumulate-and-burst. A power management circuit extracts energy near the source's maximum power point, stores it in a capacitor or small cell, and releases a burst of activity only once enough has accumulated. Two practical problems dominate: cold start, since the harvester must bring a completely discharged system up from zero without the regulator it is trying to power, and graceful degradation, since firmware must reduce sampling and reporting rates rather than fail when the ambient source weakens. These circuits are treated in detail under energy harvesting.
Thermal Coupling
Power and temperature form a closed loop. Dissipated power raises junction temperatures above ambient in proportion to the thermal resistance of the path to the surrounding environment, and in a sealed, fanless enclosure that path is often the limiting design constraint rather than the silicon itself. Higher temperature in turn raises leakage current, which raises dissipation further; where the loop gain is high enough, the result is thermal runaway rather than a new equilibrium.
Practical designs break the loop with measurement and policy. On-die temperature sensors feed a throttling scheme that reduces clock frequency, drops to a lower voltage operating point, or sheds optional work as temperature approaches a limit, preserving core function instead of shutting down. Because throttling trades performance for survival, the policy needs to be designed deliberately rather than left to a default: a device that silently halves its throughput on a warm day has a specification problem, not just a thermal one. Enclosure design, heat spreading, and interface materials belong to thermal management in design and manufacturing, and the embedded-side sensing and control are treated in this category's own thermal management article.
Measurement and Verification
Power budgets built from datasheet figures are estimates; only measurement establishes what a product actually draws. The difficulty is dynamic range. A system that sleeps at 500 nA and transmits at 20 mA spans more than four decades, and a fixed-gain shunt measurement cannot resolve both: a shunt large enough to read the sleep current develops enough voltage drop during the transmit burst to disturb the very behavior being measured. Instruments intended for this work switch ranges automatically without interrupting the supply, or use a source-measure unit that regulates voltage while logging current at high sample rates.
What matters is the integral, not the peak. Average current over a complete duty cycle, including every wake-up, radio retry, and sensor settling delay, is the figure that predicts battery life, and it is routinely worse than the design estimate because of events that the estimate omitted. Correlating a current trace against firmware events, by toggling a spare pin at state transitions or using an instrumented trace, is the fastest way to find a peripheral left enabled, a pin floating into a resistive divider, or a pull-up quietly sinking current through a sensor that was supposed to be off. Related instrumentation is covered under power measurement and analysis.
Design Considerations and Trade-offs
Power management decisions rarely have a single correct answer; each buys one property at another's expense.
Efficiency Across the Real Load Profile
Peak efficiency is the number on the front page of a datasheet and rarely the number that matters. What matters is efficiency weighted by the time the system spends at each current, which for a duty-cycled device means the light-load region. A converter that reaches 95 percent at 1 A but collapses below 60 percent at 100 µA is a poor choice for a device that spends 99 percent of its life near the latter, and adding a second, smaller converter or an efficient low-dropout regulator for the standby rail is often the better architecture.
Noise, Emissions, and Signal Integrity
Switching converters generate conducted and radiated noise at their fundamental and its harmonics, and light-load pulse-frequency modes spread that noise across a variable and less predictable band. Systems containing precision analog front ends, high-resolution converters, or sensitive radios need deliberate separation: filtered or post-regulated rails, careful placement of the switching loop to minimize its area, controlled return paths, and attention to where switching currents flow in the ground plane. Choosing a switching frequency that avoids a radio's band, or synchronizing converters to a common clock, prevents beat frequencies that are otherwise very difficult to trace.
Protection, Reliability, and Compliance
Power circuits sit at the boundary between the product and an uncontrolled outside world, and they carry most of its protection burden: reverse polarity, overvoltage transients, overcurrent and short-circuit conditions, undervoltage, and electrostatic discharge. Component derating matters as much as the protection devices themselves, since electrolytic capacitor life and semiconductor failure rates both degrade sharply with temperature. In regulated markets, the power path also carries the compliance burden, from electromagnetic-compatibility limits to standby-power regulations to the safety isolation requirements of medical and mains-connected equipment, and these constraints are far cheaper to design for than to retrofit.
Summary
Effective embedded power management is systematic rather than clever. It begins with an honest accounting of where energy goes, chooses conversion and storage technologies suited to the actual load profile rather than the peak, exploits the full hierarchy of low-power states through firmware that knows when to use each, and verifies the result by measurement rather than estimate. Thermal behavior, noise, protection, and compliance are not separate concerns bolted on afterward but properties of the same power path. The articles in this category develop each element in turn, from supply and battery design through dynamic management and harvesting to the thermal limits that ultimately bound what any of them can achieve.