Electronics Guide

The Low-Dropout Topology

Every linear regulator is a feedback loop with three parts: a voltage reference, an error amplifier, and a series pass element between input and output. A resistive divider samples the output and presents a fraction of it to the error amplifier, which compares that fraction against the reference and drives the pass element so as to force the sampled voltage to equal the reference. If the output tends to fall, the amplifier increases the conduction of the pass element to raise it; if the output tends to rise, the amplifier reduces conduction. The pass element thus behaves as a controlled resistance that continuously absorbs the difference between input and output, and the loop holds the output at the reference voltage multiplied by the divider ratio.

What separates a low-dropout regulator from a conventional one is the configuration of the pass element. A standard positive linear regulator, such as the classic 7805, uses an NPN pass transistor, or a Darlington pair, connected as an emitter follower. An emitter follower can pull its output no closer to the input than the base-emitter voltage it needs plus the headroom of the circuit that drives its base, which sets the dropout of such regulators at roughly two volts. The low-dropout topology instead uses a pass element connected so that it can be driven nearly into saturation, allowing the output to approach the input to within the small voltage the device drops when fully on. The remainder of the regulator, reference and error amplifier, is conventional; the low-dropout property is essentially a property of how the pass element is arranged and driven.

Because the loop must remain stable while the pass element operates near saturation, where its gain and output impedance vary strongly with operating point, LDO compensation is more delicate than that of a high-headroom regulator. The location of the loop's poles shifts with load current and, importantly, with the output capacitor, which is why output-capacitor selection is a first-class design constraint for LDOs and is treated separately below. The control-loop principles that underlie this behavior, including phase margin and compensation, belong to the broader subject of Feedback and Control Systems.

The Pass Element

The choice of pass device is the single decision that most shapes an LDO's dropout, quiescent current, and stability. Several devices are used, and each carries distinct consequences. A PNP bipolar pass transistor, connected with its emitter at the input and collector at the output, can saturate to a low dropout set by its collector-emitter saturation voltage, often a few hundred millivolts; it was the basis of the first generation of low-dropout regulators. Its drawback is base current: to deliver a large collector current, the error amplifier must supply a base current proportional to it, and this base current flows to ground rather than to the load, raising quiescent current and reducing efficiency, especially at heavy load.

A P-channel MOSFET pass element, with source at the input and drain at the output, eliminates the steady gate current of the bipolar approach because a MOSFET is voltage-controlled. Its dropout is the product of the load current and the on-resistance of the channel, so a low-on-resistance device achieves very low dropout, and the device draws negligible drive current in the static condition. The P-channel approach is favored in modern general-purpose LDOs for its low quiescent current. Its limitation is that a P-channel device of given on-resistance is physically larger than an equivalent N-channel device, and the gate must be driven below the source, which the internal circuitry must accommodate.

An N-channel MOSFET or NPN pass element offers the lowest on-resistance for a given die area and the best high-current performance, but it must be driven with a gate or base voltage above the input rail to turn on fully. Achieving this requires an internal charge pump or an externally supplied higher bias voltage. LDOs built this way reach very low dropout at high current and are common in high-current point-of-load regulators, at the cost of the additional bias arrangement. The pass-element choice therefore embodies a trade among dropout, quiescent current, die area, and the complexity of the gate drive, and the remaining LDO parameters follow in large part from it.

Dropout Voltage

Dropout voltage is the defining specification of an LDO: it is the smallest input-to-output differential at which the regulator still holds its output within a small specified tolerance, conventionally the point at which the output has fallen by one or two percent below its nominal value. Below the dropout differential the pass element is as fully on as it can be, the loop has lost control, and the output simply follows the input minus the drop across the pass element. Above the dropout differential the loop regulates normally.

For a MOSFET-based LDO the dropout voltage is essentially resistive, equal to the load current multiplied by the channel on-resistance. A device with a two-hundred-milliohm on-resistance regulating a half-ampere load drops one hundred millivolts at the edge of regulation, and the dropout scales linearly with current. This linear, resistive behavior is convenient because it lets the designer predict dropout at any current from a single on-resistance figure. For a bipolar PNP pass element the dropout is set instead by the collector-emitter saturation voltage and is less strongly dependent on current. In either case the data sheet specifies dropout at one or more currents and over temperature, since on-resistance and saturation voltage both rise with temperature.

Low dropout is valuable precisely because it widens the usable input range and reduces dissipation. A regulator producing 3.3 volts from a lithium-ion cell whose voltage sags toward 3.4 volts near the end of discharge can continue to regulate only if its dropout is below about one hundred millivolts; a two-volt-dropout regulator would have fallen out of regulation long before. The same low dropout reduces the voltage the pass element must drop in normal operation, which directly reduces the heat it dissipates. Dropout, however, is not the same as efficiency: even at minimal dropout the regulator still dissipates the dropout voltage times the load current, and the efficiency of any linear regulator remains close to the ratio of output to input voltage.

Power-Supply Rejection

Power-supply rejection ratio, abbreviated PSRR, measures how well the regulator prevents variation on its input from reaching its output, expressed in decibels as a function of frequency. A PSRR of sixty decibels at a given frequency means that an input ripple component at that frequency appears at the output attenuated by a factor of one thousand. High PSRR is one of the principal reasons to choose an LDO, because it allows the regulator to scrub switching ripple, mains-frequency ripple, and supply noise from a rail feeding a sensitive analog, radio-frequency, or clock circuit. This is the basis of the common architecture in which a switching converter steps a voltage down efficiently and an LDO follows it to deliver a quiet output.

PSRR is strong at low frequency, where the high loop gain of the regulator actively corrects input disturbances, and it degrades as frequency rises because the loop gain falls off above the regulator's bandwidth. A typical LDO shows rejection of sixty to eighty decibels at low frequency, a roll-off through the kilohertz range as loop gain declines, and a recovery or plateau at high frequency where the output capacitor and the pass element's behavior dominate. The frequency at which PSRR is weakest often falls near the loop's unity-gain crossover, and a designer scrubbing the ripple of a particular switching converter must confirm that the LDO still provides adequate rejection at that converter's switching frequency and its harmonics, not merely at low frequency.

Two practical factors strongly affect realized PSRR. The first is headroom: PSRR collapses as the regulator approaches dropout, because the pass element near saturation can no longer modulate to oppose input changes, so an LDO operated with too little input-to-output margin loses much of its rejection. The second is the output capacitor and the input bypassing, which set the high-frequency rejection that the loop alone cannot provide. Achieving a data-sheet PSRR figure therefore requires operating with adequate headroom and with the recommended capacitors, and high-PSRR analog LDOs are specifically designed and characterized to maintain rejection well into the megahertz range for exactly these post-regulation roles.

Line and Load Regulation

Line regulation and load regulation describe the regulator's static, or direct-current, accuracy as its operating conditions change, and they complement PSRR, which describes the dynamic, frequency-dependent response. Line regulation is the change in output voltage produced by a change in input voltage at fixed load, often expressed as a percentage of output, as millivolts of output change, or as a fraction per volt of input. It is the zero-frequency limit of power-supply rejection and is set by the loop gain: the higher the gain with which the loop holds the output to the reference, the less the output moves when the input changes. Well-designed LDOs achieve line regulation of a few millivolts or a fraction of a percent across their full input range.

Load regulation is the change in output voltage produced by a change in load current at fixed input, expressed in millivolts, as a percentage, or in millivolts per ampere. It too is governed by loop gain and by the output impedance the loop presents: as the load draws more current, the output tends to sag, and the loop responds by increasing pass-element conduction to restore it, leaving a small residual error inversely related to the loop gain. Resistance in the output path, including bond wires, package leads, and circuit-board traces, adds directly to the apparent load regulation, which is why high-accuracy designs sense the output as close to the load as possible and why some regulators provide separate sense terminals for remote sensing.

Line and load regulation together with the reference's own accuracy set the total direct-current tolerance of the regulated rail. In a precision design the reference initial accuracy and temperature coefficient usually dominate this budget, with line and load regulation contributing smaller terms, but all combine. Beyond the static figures, the load transient response, the brief output excursion when the load current steps abruptly, is often the more demanding requirement in practice. The size of that excursion depends on the loop bandwidth and on the output capacitor, which must supply the load's instantaneous current demand during the brief interval before the loop responds, linking transient performance once again to capacitor selection.

Output-Capacitor Stability and ESR

An LDO is a feedback loop, and like any feedback loop it can oscillate if its phase margin is inadequate. The output capacitor is part of that loop, because it forms a pole with the regulator's output impedance, and its value and its equivalent series resistance, abbreviated ESR, directly shape the loop's frequency response. For this reason an LDO is not unconditionally stable with any output capacitor; the data sheet specifies a range of acceptable capacitance and, for many parts, a range of acceptable ESR, and operation outside that range can produce oscillation. Output-capacitor selection is consequently one of the most important and most frequently mishandled aspects of LDO application.

Older LDOs, particularly bipolar designs, were commonly compensated to rely on the ESR of the output capacitor to place a zero that stabilizes the loop. With such parts the data sheet defines a stable region bounded on one side by too little ESR and on the other by too much, often drawn as a region on a plot of ESR against load current and sometimes called the stability "tunnel." These parts were designed in the era of tantalum and aluminum electrolytic capacitors, whose ESR fell naturally within the required band. The advent of ceramic capacitors, whose ESR is very low, created a hazard: a low-ESR ceramic capacitor on an LDO that requires ESR for stability removes the stabilizing zero and can cause the regulator to oscillate. A designer replacing a tantalum capacitor with a ceramic one on such a part can introduce an oscillation that was absent before.

Modern LDOs are increasingly designed for stability with low-ESR ceramic capacitors, using internal compensation that does not depend on the capacitor's series resistance, and many are specified as ceramic-capacitor-stable down to zero ESR. Even with these parts the capacitance value matters, because too small a capacitor moves the output pole and degrades phase margin while too large a capacitor can slow the loop or, in some designs, also reduce margin. A further subtlety with ceramic capacitors is that their capacitance falls substantially with applied direct-current bias voltage and with temperature, so a capacitor rated at a nominal value may present far less capacitance at the operating point, and the designer must verify the effective capacitance rather than the nameplate value. The reliable practice is to use the capacitor type and value the manufacturer specifies and to confirm stability across the full range of load current, temperature, and bias.

Quiescent Current and Efficiency

Quiescent current, sometimes called ground current, is the current the regulator consumes for its own operation, drawn from the input but not delivered to the load. It powers the reference, the error amplifier, and the bias networks, and in a bipolar LDO it also includes the base drive of the pass transistor. Quiescent current is a defining parameter for battery-powered systems, because in a device that spends most of its time in a low-power standby state, the regulator's quiescent current may dominate the average current draw and therefore the battery life, even though it is negligible compared with the active load current.

Modern low-power LDOs achieve quiescent currents in the range of microamperes or even tens of nanoamperes in dedicated parts, a property made possible largely by the move from bipolar to MOSFET pass elements, since a MOSFET requires no steady gate current and its drive does not scale with load. The bipolar PNP pass element, by contrast, draws base current proportional to load current, so its effective quiescent current rises with load and its efficiency suffers most when delivering high current at low headroom. The distinction matters when comparing data sheets, because a quiescent current quoted at no load may be far smaller than the current the same part draws when fully loaded.

The efficiency of an LDO is fundamentally limited and easily estimated. The output power is the output voltage times the load current; the input power is the input voltage times the sum of the load current and the quiescent current. At appreciable load the quiescent term is negligible, and the efficiency reduces approximately to the ratio of output voltage to input voltage. An LDO producing 1.8 volts from 3.3 volts is therefore at best about fifty-five percent efficient regardless of how well it is designed, because the remaining voltage difference is dissipated as heat in the pass element. This unavoidable relationship is the central reason an LDO is chosen for a small voltage drop and a switching regulator for a large one.

Thermal Limits and Protection

Because an LDO dissipates the unused power as heat, its thermal behavior frequently sets the true limit on how much current it can deliver, well before any current limit of the silicon. The power dissipated in the pass element is the input-to-output voltage difference multiplied by the load current, plus the small contribution of the quiescent current times the input voltage. This power raises the junction temperature above ambient by an amount equal to the power times the thermal resistance from junction to ambient, a figure dominated in most small packages by the path from the package to the circuit board and the surrounding air. The maximum deliverable current is whatever keeps the junction temperature below its rated maximum, commonly one hundred twenty-five or one hundred fifty degrees Celsius, at the worst-case input voltage and ambient temperature.

A worked illustration shows how restrictive this can be. An LDO dropping 5 volts to 3.3 volts at a load of five hundred milliamperes dissipates the differential of 1.7 volts times 0.5 ampere, or 0.85 watt. In a small surface-mount package with a junction-to-ambient thermal resistance of fifty degrees Celsius per watt, that dissipation raises the junction roughly forty-three degrees above the board temperature, which may be acceptable at a moderate ambient but not at a high one. The same calculation shows why a large input-to-output drop at high current is impractical for a linear regulator and why a switching pre-regulator is used to reduce the drop before an LDO produces the final low-noise rail.

To protect itself against faults and excessive dissipation, an LDO integrates several safeguards. Thermal shutdown monitors the die temperature and disables the pass element when the junction reaches a critical temperature, re-enabling it after the part cools, so that a sustained overload causes the regulator to cycle rather than fail. Current limiting, often by foldback in which the limit decreases as the output voltage collapses, caps the output current to protect the pass element under a short circuit. Many LDOs also include reverse-current or reverse-battery protection and an enable input that places the part in a near-zero-current shutdown state. These protections are integral to the device, and the data sheet's safe-operating limits, together with the thermal calculation above, determine the conditions under which the regulator operates reliably.

Comparison with Switching Regulators

The LDO and the switching regulator are the two means of producing a regulated rail, and choosing between them is a recurring decision in power design. Their difference is fundamental. An LDO is a linear regulator that drops the surplus voltage continuously across a pass element and dissipates it as heat; its efficiency is therefore bounded by the ratio of output to input voltage and falls as the voltage difference grows. A switching regulator instead turns its power device fully on and off at high frequency, storing energy in an inductor and releasing it to the output, so it dissipates little in the switch and reaches efficiencies in the high eighties to high nineties of a percent across a wide voltage ratio. The principles of commanding that switch are the subject of Switching Converter Control.

Each approach trades a different set of properties. The LDO offers low output noise, because it has no switching action to generate ripple; high power-supply rejection that scrubs noise from its input; fast transient response; small size, because it needs no inductor; and low cost and design simplicity. Its penalties are poor efficiency at large voltage drops and the heat that efficiency loss produces. The switching regulator offers high efficiency and, with it, longer battery life and less heat, together with the ability to step voltages up as well as down and to invert them, which an LDO cannot do. Its penalties are switching ripple and electromagnetic interference that must be filtered and contained, a more complex control loop that must be compensated for stability, the need for an inductor and its associated board area, and greater design effort.

In practice the two are complementary far more often than competitive. A switching converter is used where the voltage ratio is large or the current high, so that the efficiency advantage is decisive, and an LDO is used where the drop is small, where the load is noise-sensitive, or where simplicity and board area dominate. The combined architecture exploits both: a switching converter steps the input down efficiently to an intermediate rail a few hundred millivolts above the target, and an LDO follows it to remove the switching ripple and deliver a quiet, accurate output to a sensitive analog, radio-frequency, or clock load. The decision is thus rarely an exclusive one; it is a matter of assigning each regulator to the part of the power tree where its strengths apply.

Summary

A low-dropout regulator is a linear regulator arranged so that its pass element can be driven nearly to saturation, allowing it to regulate when the input exceeds the output by only a small margin. Like every linear regulator it is a feedback loop of reference, error amplifier, and series pass element, and it inherits the family virtues of low noise, fast response, and simplicity together with the family limitation that it dissipates the unused power as heat. The choice of pass element, bipolar PNP, P-channel MOSFET, or an N-channel device with elevated gate drive, sets the dropout, the quiescent current, and much of the stability behavior, and the rest of the regulator's specifications follow from it.

The parameters that govern LDO application form a connected set. Dropout voltage, resistive in a MOSFET design and equal to the load current times the on-resistance, fixes the usable input range and the minimum dissipation. Power-supply rejection, line regulation, and load regulation describe how well the loop holds the output against input and load disturbances across frequency, and all depend on loop gain and on adequate headroom. Output-capacitor value and equivalent series resistance shape the loop's stability and must lie within the manufacturer's specified region, a constraint sharpened by the low ESR of ceramic capacitors and by their loss of capacitance under bias. Quiescent current sets battery life in low-power systems, and thermal resistance, through the dissipation of the voltage drop times the load current, usually sets the real current limit.

Against the switching regulator, the LDO is the quiet, simple, small, and inexpensive choice for a small voltage drop and a noise-sensitive load, while the switching regulator is the efficient choice for a large drop, a high current, or a step-up or inverting conversion. The two are most often combined rather than opposed, with a switching stage providing efficient bulk conversion and an LDO providing clean post-regulation. Understanding the LDO's topology, its pass element, and the interlocking parameters of dropout, rejection, regulation, stability, quiescent current, and thermal limit is what allows a designer to place it correctly in a power system and to extract its specified performance in a real circuit.

Related Topics

• Linear Voltage Regulators - The broader linear-regulator family, including series-pass and shunt configurations, current limiting, and thermal protection
• Switching Converter Control - The efficient alternative to linear regulation and the partner stage in combined architectures
• Power Supply Support Circuits - Input protection, filtering, and decoupling that surround a regulator in a complete supply
• Voltage References - The reference that sets an LDO's output accuracy and temperature behavior
• Feedback and Control Systems - The loop-stability theory behind compensation, phase margin, and transient response
• Power Supply and Voltage Regulation - Parent category covering regulation, references, and supporting circuits