Power-On Reset and Supervisory Circuits

Power-on reset and supervisory circuits form the foundation of reliable electronic system operation, ensuring that processors, memory, and logic circuits begin operation only when supply voltages have stabilized at safe levels. These circuits monitor power supply health continuously, generating reset signals during power-up, power-down, and any transient events that could corrupt system operation. From simple RC delay circuits to sophisticated multi-channel supervisors with programmable thresholds and timing, these components are essential for creating systems that operate predictably under all conditions.

The importance of proper system initialization cannot be overstated. A microcontroller that begins executing code before its supply voltage stabilizes may read corrupted data from flash memory, write erroneous values to registers, or enter undefined states that persist until the next power cycle. Supervisory circuits prevent these failures by holding the system in reset until conditions are safe, then releasing reset with precise timing to ensure orderly startup. This article explores the principles, implementations, and applications of power-on reset and supervisory circuits essential for robust electronic system design.

Fundamentals of Power-On Reset

Power-on reset (POR) circuits generate a reset signal that initializes digital systems to a known state when power is first applied. The basic requirement seems simple: assert reset when power is off and release it after power stabilizes. However, the real-world behavior of power supplies during startup creates significant challenges that simple approaches fail to address adequately.

Power Supply Startup Behavior

When power is applied to an electronic system, the supply voltage does not instantaneously jump to its final value. Instead, it rises according to characteristics determined by the power source, input capacitance, inrush limiting circuits, and load behavior. This rise may be monotonic with a predictable time constant, or it may exhibit non-monotonic behavior with plateaus, dips, or oscillations caused by the interaction between the power supply and its load.

Several startup scenarios present challenges for reset circuits:

Slow ramp: Very slow supply voltage rise times, common with large bulk capacitors or soft-start circuits, may cause simple threshold-based reset circuits to release reset before the supply is fully stable
Non-monotonic rise: Some power supplies exhibit voltage dips during startup as different loads activate. A reset circuit that releases when voltage first crosses the threshold may see voltage subsequently drop below operating levels
Supply sequencing: Systems with multiple supply rails may have constraints on the order and timing of rail startup. Some processors require core voltage before I/O voltage; others have the opposite requirement
Hot insertion: Boards inserted into powered backplanes experience very fast voltage rise times that may exceed the response capability of some reset circuits

Basic Reset Circuit Requirements

An effective power-on reset circuit must satisfy several requirements:

Assert reset at power-up: Reset must be active immediately when power is applied, before the supply voltage reaches levels where the processor might attempt operation
Hold reset during voltage rise: Reset must remain asserted throughout the supply voltage rise, not releasing during non-monotonic transients
Release reset after stabilization: Reset should release only after the supply has reached a stable, valid operating level
Provide adequate reset pulse width: The reset signal must remain active long enough to guarantee proper initialization of all system components
Re-assert during power failure: If supply voltage drops below safe operating levels during operation, reset must re-assert to prevent corrupted operation

Simple RC Reset Circuits

The simplest power-on reset circuit uses a resistor and capacitor to generate a time-delayed signal as the supply voltage rises. When power is applied, the capacitor is discharged, holding the reset input low. The capacitor charges through the resistor with a time constant of RC, eventually crossing the processor's reset threshold and releasing the device from reset.

While simple and inexpensive, RC reset circuits have significant limitations:

No voltage threshold: Release timing depends on RC time constant rather than actual supply voltage level. A slow-ramping supply may stabilize before the RC delay expires, wasting startup time. Conversely, a fast-ramping supply may trigger reset release before voltage is adequate
No brown-out protection: Once the capacitor is charged, brief supply voltage dips do not re-trigger reset. The system continues operating through conditions that may corrupt data or cause erratic behavior
Component tolerance: Resistor and capacitor tolerances of plus or minus 20% result in wide variations in reset timing
Temperature dependence: Capacitor values, especially electrolytics, vary significantly with temperature, affecting reset timing
Leakage currents: Input leakage of CMOS reset inputs and capacitor leakage affect the charging behavior and steady-state voltage

Despite these limitations, RC circuits remain adequate for simple, non-critical applications where cost is paramount and supply behavior is well-controlled.

Brown-Out Detection

Brown-out detection extends power-on reset functionality to address supply voltage drops during operation. A brown-out occurs when the supply voltage falls below the minimum level required for reliable operation but does not drop to zero. Without brown-out detection, processors may continue executing code with corrupted memory reads, incorrect calculations, or failed peripheral operations.

Brown-Out Causes

Several conditions cause brown-out events:

Load transients: Sudden increases in current draw, such as activating motors, transmitters, or displays, can cause supply voltage to sag momentarily until the power supply recovers
Source impedance: Long cable runs, undersized conductors, or high-impedance power sources allow significant voltage drop under load
Battery discharge: As batteries approach end-of-charge, their terminal voltage may dip under load below the minimum required for reliable operation
Power supply instability: Switching power supplies may exhibit transient output dips during load steps or input voltage changes
Environmental factors: Temperature extremes, humidity, or vibration can affect power supply performance and cause temporary voltage excursions

Brown-Out Detection Thresholds

Brown-out detectors compare the supply voltage against a precise threshold, asserting reset when voltage falls below this level. Threshold selection involves balancing reliability against false triggering:

Too high a threshold: Causes spurious resets during normal supply variations, reducing system availability
Too low a threshold: Allows operation during marginal conditions, risking data corruption or erratic behavior before reset assertion

The optimal threshold depends on the processor's specified minimum operating voltage, power supply regulation accuracy, and expected transient amplitudes. A typical approach sets the brown-out threshold approximately 5% above the processor's minimum VDD specification, providing margin for comparator accuracy and noise.

Hysteresis in Brown-Out Detection

Simple threshold comparators without hysteresis can oscillate when the supply voltage hovers near the threshold. Noise or ripple causes repeated threshold crossings, generating multiple reset pulses that may corrupt data more severely than continuous operation through the low-voltage condition.

Hysteresis creates separate rising and falling thresholds, typically 50-200mV apart. The brown-out detector asserts reset when voltage falls below the lower threshold and does not release reset until voltage rises above the higher threshold. This prevents oscillation and ensures clean reset transitions even with noisy supply voltages.

Brown-Out Response Time

The delay between supply voltage falling below threshold and reset assertion determines how much erroneous operation may occur during a brown-out event. Faster response times minimize the window for corruption but may trigger on very brief transients that the system could tolerate.

Many brown-out detectors include filtering that ignores transients below a specified duration, typically 10-100 microseconds. This prevents spurious resets from brief supply glitches while still responding quickly to genuine brown-out conditions.

Power-Good Indicators

Power-good signals provide status information about power supply health to system controllers, enabling intelligent power management and diagnostic capabilities. Unlike reset signals that directly control processor operation, power-good indicators inform software of supply conditions, allowing graduated responses to power events.

Power-Good Signal Sources

Power-good signals originate from several sources within a power system:

Voltage regulator outputs: Most switching regulators and many linear regulators include a power-good output that indicates when the output voltage is within regulation. This signal typically asserts when output reaches approximately 90% of target and de-asserts when output falls below approximately 85%
Dedicated supervisory ICs: Precision voltage monitors with accurate thresholds and defined timing characteristics provide reliable power-good indication for critical supplies
Power management ICs: Integrated PMIC devices that generate multiple supply rails typically provide power-good outputs for each rail and an overall system power-good that combines all individual indicators

Power-Good Applications

Power-good signals serve multiple purposes in system design:

Sequencing control: Power-good from one regulator can enable subsequent regulators, ensuring proper power-up sequencing without dedicated sequencer ICs
Processor monitoring: Software can poll power-good inputs to detect impending power failure and initiate graceful shutdown procedures
Interrupt generation: Power-good transitions can trigger processor interrupts, enabling rapid response to supply events
System diagnostics: Logging power-good transitions provides insight into power supply behavior and system reliability
LED indication: Power-good signals can directly drive status LEDs for visual power supply health indication

Power-Good Timing Characteristics

The timing relationship between supply voltage and power-good assertion affects system behavior:

Assertion delay: Power-good typically asserts some time after voltage reaches the valid threshold, ensuring stability before indicating good status. Delays range from microseconds to milliseconds
De-assertion delay: When voltage falls below threshold, power-good may de-assert immediately or after a brief filter delay. Fast de-assertion provides early warning; slower de-assertion prevents spurious indications
Startup blanking: Some power-good circuits include blanking periods during startup when the output is forced inactive regardless of voltage, preventing premature assertion during supply ramp

Sequencing and Tracking

Modern electronic systems frequently require multiple supply voltages: core voltage for processor logic, I/O voltage for external interfaces, analog supplies for converters, and memory voltages for DRAM or flash. These supplies often have specific requirements for the order and timing of their power-up and power-down sequences to prevent damage, latch-up, or undefined states.

Sequencing Requirements

Supply sequencing requirements arise from several sources:

Device specifications: Many processors and FPGAs specify that core voltage must be present before or simultaneously with I/O voltage to prevent excessive current flow through internal ESD protection structures or parasitic thyristors
Latch-up prevention: CMOS devices can enter latch-up if an input voltage exceeds the supply voltage. Proper sequencing ensures supplies are present before signals become active
Memory initialization: Some memory devices require specific supply sequencing for proper initialization of internal bias circuits
Analog settling: Precision analog circuits may require reference voltages to stabilize before signal voltages are applied

Basic Sequencing Methods

Several approaches implement supply sequencing:

Cascaded enable: The power-good output of one regulator enables the next in sequence. Simple and reliable, but adds startup delay as each stage must reach regulation before the next begins
RC delay networks: Different RC time constants on regulator enable pins create staggered startup. Less precise than cascaded enable and does not guarantee relative voltage levels
Dedicated sequencer ICs: Specialized devices monitor multiple rails and generate enable signals with precise timing and threshold control. Some include fault logging and retry functionality
PMIC integration: Power management ICs with multiple integrated regulators typically include sequencing logic that ensures proper startup order

Voltage Tracking

Some applications require supplies to maintain specific voltage relationships during startup rather than strict sequencing. Tracking ensures that as one supply ramps, others follow proportionally:

Ratiometric tracking: Supplies maintain a constant ratio during ramp. A 3.3V supply and 1.8V supply might both reach 50% of final value at the same time, then 75%, and so on
Coincident tracking: Supplies remain equal (or at a fixed offset) during ramp until one reaches its target, then remains constant while the other continues to its target
Offset tracking: One supply follows another with a fixed voltage offset, useful for maintaining specific gate-source voltages on series-pass elements

Power-Down Sequencing

Proper power-down sequencing is equally important but often overlooked. The sequence typically reverses the power-up order, removing I/O voltages before core voltages. This prevents signal pins from driving current into unpowered I/O banks or creating latch-up conditions as supplies fall.

Implementing power-down sequencing presents unique challenges because energy stored in output capacitors maintains supply voltages for some time after the input is removed. Sequencers may need active discharge circuits or load switches to control the fall rate of each supply.

Soft-Start Control

Soft-start circuits limit the rate of voltage or current rise during power-up, reducing stress on power supply components, minimizing inrush current, and preventing voltage overshoot. While primarily a power supply feature, soft-start behavior significantly affects reset timing and system startup characteristics.

Inrush Current Limiting

When power is applied to a system with significant capacitance, the uncharged capacitors present near-zero impedance to the source. Without limiting, the resulting inrush current can:

Trip protection devices: Circuit breakers, fuses, or current-limited supplies may interpret inrush as a fault condition
Stress components: High current pulses stress connector contacts, PCB traces, and semiconductor devices
Cause voltage dips: In multi-board systems, one board's inrush can affect supplies to other boards sharing the same source
Generate EMI: Fast current transients radiate electromagnetic interference and induce noise in adjacent circuits

Soft-Start Implementation

Several techniques implement soft-start behavior:

Linear regulator soft-start: A capacitor on a soft-start pin slowly charges through an internal current source, ramping the internal reference and thus the output voltage. Soft-start times range from hundreds of microseconds to tens of milliseconds
Switching converter soft-start: Similar capacitor-based approaches limit duty cycle or reference voltage during startup, controlling the output voltage rise rate independent of load capacitance
Series element control: A series MOSFET or pass transistor operated in its linear region limits current during startup, transitioning to fully enhanced operation once output voltage stabilizes
Pre-charge circuits: Before main power is applied, a current-limited pre-charge circuit partially charges bulk capacitors to reduce the initial voltage step and inrush current

Soft-Start and Reset Timing

Soft-start circuits must coordinate with reset circuits to ensure proper system initialization:

Reset release timing: Reset must remain asserted until soft-start completes and output voltage reaches its final, stable value
Sequencing interactions: In sequenced systems, soft-start on each stage adds to total startup time. Very long soft-start times may trigger watchdog timeouts or violate system startup time budgets
Power-good timing: Power-good assertion should wait until after soft-start completes to indicate genuine output stability

Undervoltage Lockout

Undervoltage lockout (UVLO) circuits disable power conversion or system operation when input voltage falls below a threshold required for proper function. While related to brown-out detection, UVLO typically operates on the input side of power converters rather than monitoring regulated outputs.

UVLO Functions

Undervoltage lockout serves several purposes:

Prevent malfunction: Many power converters cannot regulate properly below minimum input voltage. Operating in this condition may produce incorrect output voltages or excessive ripple
Protect batteries: UVLO prevents deep discharge of batteries by disconnecting loads before cell voltage falls to damaging levels
Ensure margin: Setting UVLO above the absolute minimum input allows headroom for load transients and component tolerances
Reduce power-up issues: UVLO ensures the system only attempts startup when adequate input voltage is available, preventing repeated failed start attempts

UVLO Threshold Selection

Selecting appropriate UVLO thresholds requires balancing several factors:

Minimum operating input: The UVLO threshold must be above the minimum input voltage at which the downstream converter or system can function properly
Source characteristics: Battery discharge curves, AC-DC converter droop under load, and source impedance effects all influence appropriate threshold selection
Hysteresis requirements: Sufficient hysteresis prevents chattering near threshold when source voltage varies with load
System startup requirements: The startup threshold should ensure enough energy is available to complete power-up sequence without retriggering UVLO

UVLO Implementation

UVLO implementation varies by application:

Integrated in controllers: Most switching regulator controllers include UVLO that disables switching when VIN falls below threshold, often programmable with external resistors
Dedicated UVLO ICs: Standalone devices monitor input voltage and control load switches or regulator enable pins, providing UVLO for systems using regulators without built-in protection
Discrete circuits: Comparator-based discrete circuits using precision references can implement UVLO with customized thresholds and hysteresis

Overvoltage Protection

Overvoltage protection (OVP) circuits protect sensitive electronics from supply voltages exceeding maximum ratings. While less common than undervoltage conditions in well-designed systems, overvoltage events can cause immediate, catastrophic damage to semiconductor devices.

Overvoltage Causes

Overvoltage conditions arise from several sources:

Regulator failure: A failed series pass element or control circuit can cause regulator output to rise to input voltage level
Load dump: In automotive systems, disconnecting a partially discharged battery while the alternator is active causes a transient that can exceed 100V
Lightning and switching transients: Induced transients from nearby lightning or inductive load switching can superimpose high voltage spikes on supply rails
Incorrect power source: Connecting a higher-voltage supply than intended, or reverse polarity connection, creates overvoltage conditions
Ground faults: In systems with multiple supplies referenced to different grounds, fault conditions can create elevated voltages relative to local ground

OVP Response Methods

Overvoltage protection circuits respond to overvoltage events in several ways:

Clamping: Zener diodes, TVS devices, or active clamps limit voltage to safe levels by shunting excess current. Effective for transient events but limited by power dissipation for sustained overvoltage
Crowbar: A triggered SCR or TRIAC shorts the supply rail to ground when voltage exceeds threshold, blowing a fuse to disconnect power. Provides definitive protection but requires fuse replacement
Series disconnect: A switch (FET or relay) in series with the supply opens when overvoltage is detected, disconnecting the load from the source. Can be self-resetting when voltage returns to normal
Regulator shutdown: The overvoltage condition disables the regulator, preventing further voltage rise at the expense of losing power to the load

OVP Threshold Considerations

Setting OVP thresholds involves trade-offs:

Above maximum expected variation: Threshold must be above normal supply variations including regulation tolerance, ripple, and transient response to avoid spurious trips
Below component absolute maximum: Threshold must protect components before voltage exceeds absolute maximum ratings, including appropriate derating
Response time: The protection circuit must respond faster than the rate of voltage rise to prevent brief overvoltage excursions from causing damage

Watchdog Timers for Analog Systems

Watchdog timers provide a safety mechanism that resets the system if software fails to periodically indicate normal operation. While typically associated with digital systems, watchdog functionality is equally important in analog-intensive systems where processor malfunction can result in unsafe conditions.

Watchdog Operating Principles

A watchdog timer contains an oscillator and counter that continuously counts toward a timeout threshold. Normal software operation periodically resets the counter before timeout occurs, a process called "kicking" or "feeding" the watchdog. If software hangs, enters an infinite loop, or otherwise fails to service the watchdog, the counter reaches timeout and triggers a system reset.

Watchdog Characteristics

Key watchdog parameters include:

Timeout period: The time from last kick to reset assertion. Too short causes spurious resets during legitimate long operations; too long delays recovery from actual failures. Typical periods range from milliseconds to seconds
Window mode: Some watchdogs require kicks within a specific window, neither too early nor too late. This detects runaway software that kicks too frequently as well as hung software that never kicks
Reset pulse width: The duration of the reset output pulse must be adequate to properly initialize all system components
Timeout indication: Some watchdogs provide outputs or register bits indicating that the most recent reset was caused by watchdog timeout rather than power-on reset

Watchdog Implementation Options

Watchdog timers are available in several forms:

Internal to processor: Most microcontrollers include built-in watchdog timers. However, internal watchdogs may be disabled by the same faults that affect software, reducing their effectiveness as safety devices
External watchdog ICs: Dedicated external watchdogs operate independently of the processor's clock and power domains, providing more robust protection against system-wide failures
Integrated in supervisory ICs: Many voltage supervisor ICs include watchdog timers, combining supply monitoring and software monitoring in a single device

Watchdog in Safety-Critical Systems

Safety-critical applications often require additional watchdog features:

Independent clock source: The watchdog timer should use a separate oscillator from the main processor to detect clock failures
Question and answer: Advanced watchdogs require software to respond with specific data sequences rather than simple pulses, detecting stuck-at faults in the kick signal path
Multiple timeout stages: Some watchdogs provide warning outputs before reset, allowing software to save state or initiate graceful shutdown

System Health Monitoring

Comprehensive system health monitoring extends beyond simple voltage supervision to track multiple parameters that indicate system condition. Modern supervisory ICs and power management units integrate numerous monitoring functions that together provide a complete picture of system health.

Monitored Parameters

System health monitors may track:

Multiple supply voltages: Independent monitoring of each supply rail with individual thresholds appropriate for that rail's requirements
Temperature: Ambient, board, or component temperature monitoring with over-temperature warning and shutdown thresholds
Current consumption: Monitoring load current detects short circuits, failed loads, or abnormal operating conditions
Clock presence: Detecting loss of processor clock indicates system failure requiring reset
Memory integrity: Some advanced monitors include memory checksum or ECC verification

Status Reporting

Health monitors communicate status through various interfaces:

Discrete outputs: Individual status pins for each monitored parameter allow simple hardware responses to specific faults
Combined status: A single power-good or system-good output indicates overall health, simplifying interface requirements
Serial interfaces: I2C or SPI interfaces allow processors to read detailed status registers, configure thresholds, and access fault logs
Interrupt outputs: Alert or interrupt outputs notify processors of status changes without polling

Fault Logging and Diagnostics

Advanced health monitors include fault recording capabilities:

Fault registers: Latching registers record which fault conditions occurred, surviving the subsequent reset to enable post-mortem analysis
Timestamp logging: Some devices record the time of fault events, enabling correlation with system events
Fault counters: Counting fault occurrences identifies intermittent problems that might not be caught during single observations
Non-volatile storage: Critical fault data stored in EEPROM or flash survives power cycles, enabling field diagnosis of systems that experienced failures

Supervisory IC Selection

Selecting an appropriate supervisory IC requires matching device capabilities to application requirements. The wide variety of available devices, from simple single-threshold detectors to complex multi-channel programmable supervisors, offers solutions for every application.

Key Selection Criteria

Important parameters to consider include:

Number of monitored voltages: Single, dual, or multi-channel devices match the number of supply rails requiring supervision
Threshold accuracy: Precision applications may require plus or minus 1% threshold accuracy; cost-sensitive applications may accept plus or minus 5%
Reset output type: Push-pull, open-drain, or manual reset input capability suits different interface requirements
Watchdog inclusion: Integrated watchdog timer eliminates a separate component
Adjustable thresholds: Fixed threshold devices simplify design; adjustable devices provide flexibility for multiple applications
Operating current: Battery-powered applications demand microamp-level supply current
Package options: SOT-23, SC-70, or chip-scale packages for space-constrained designs; larger packages for prototyping or when thermal dissipation matters

Common Supervisory IC Families

Several device families serve common supervisory applications:

Simple voltage detectors: Devices like the TLV840 provide single-threshold detection in minimal packages with microamp supply current
Standard supervisors: The MAX809/MAX810 family offers fixed thresholds with pushbutton reset input in SOT-23 packages
Precision supervisors: The MAX6450 and similar devices provide plus or minus 0.5% threshold accuracy for precision supply monitoring
Multi-voltage supervisors: The MAX6870 and similar devices monitor up to eight voltages with sequencing control and fault indication
Programmable supervisors: The LTC2933 and similar devices offer field-programmable thresholds stored in EEPROM, adapting to different board configurations

Application-Specific Considerations

Different applications impose specific requirements:

Portable devices: Minimum supply current and small package size prioritize battery life and board space
Industrial systems: Wide operating temperature range, robust ESD protection, and long-term availability matter most
Automotive applications: AEC-Q100 qualification, operation through cold-crank voltage dips, and load dump protection are essential
Safety-critical systems: Redundant monitoring, fail-safe behavior, and detailed fault reporting support safety certification requirements

Design Best Practices

Effective supervisory circuit design requires attention to details that ensure reliable operation across all system conditions.

Layout Considerations

Proper PCB layout supports supervisory circuit performance:

Bypass capacitor placement: Place bypass capacitors as close as possible to supervisor IC supply pins with short, low-inductance traces
Sense point location: Monitor supply voltage at the point of load, not at the regulator output, to capture IR drops in distribution traces
Noise isolation: Route sensitive threshold inputs away from switching power supply nodes and digital signal traces
Reset distribution: Use dedicated reset traces rather than daisy-chaining to ensure simultaneous reset arrival at all devices

Threshold Margin

Setting appropriate threshold margins ensures reliable operation:

Account for tolerances: Sum the effects of reference accuracy, comparator offset, resistor divider tolerance, and temperature coefficients
Include supply variation: The supervised rail itself varies with load, temperature, and input conditions; thresholds must remain valid across this range
Consider noise: Power supply noise and ripple effectively reduce the margin between nominal voltage and threshold; filtering may be necessary

Reset Timing Coordination

Ensuring proper reset timing prevents startup issues:

Meet minimum pulse width: Verify that reset pulse duration meets requirements of all supervised devices, choosing the longest if requirements differ
Coordinate multiple supervisors: In systems with multiple supervisory ICs, ensure reset outputs are combined appropriately (wired-OR for active-low signals)
Sequence with software initialization: Reset timing must provide adequate time for oscillator startup, PLL lock, and boot code execution before watchdog timeout

Conclusion

Power-on reset and supervisory circuits, while often overlooked in early system design, are essential for creating electronic systems that operate reliably under real-world conditions. From ensuring orderly startup when power is first applied to protecting against brown-out events that could corrupt data, these circuits provide the foundation upon which predictable system behavior is built.

The evolution from simple RC delay circuits to sophisticated multi-channel supervisors with integrated watchdogs, programmable thresholds, and comprehensive fault logging reflects the increasing complexity of modern electronic systems and the correspondingly higher expectations for reliability. Understanding the full range of supervisory functions, including power-on reset, brown-out detection, sequencing, soft-start, undervoltage lockout, overvoltage protection, watchdog timers, and health monitoring, enables engineers to select appropriate solutions and implement them effectively.

Whether designing a simple battery-powered sensor or a complex multi-rail processing system, proper attention to supervisory functions ensures that the system initializes correctly, operates reliably through supply transients, and recovers gracefully from fault conditions. These circuits represent a small fraction of system cost but deliver an outsized contribution to overall system quality and reliability.