Electronics Guide

Open-Loop and Closed-Loop Control

An open-loop controller acts on the command alone. A toaster heats for a set time, and a stepper-motor drive counts out pulses. Such a system is only as accurate as its calibration, and it cannot notice a heavier load, a sagging supply, or a worn part.

A closed-loop controller measures the output, compares it with the reference, and acts on the difference. In the standard single loop, the reference R(s) and the measured output Y(s) form the error E(s) = R(s) − Y(s). A controller C(s) turns the error into a drive signal for the plant G(s), and a disturbance D(s), such as a load torque, enters at the plant input. With a sensor of unity gain and negligible lag,

Y(s) = [C(s)G(s) / (1 + C(s)G(s))] R(s) + [G(s) / (1 + C(s)G(s))] D(s)

The product L(s) = C(s)G(s) is the loop transfer function, or loop gain; a sensor with transfer function H(s) makes it C(s)G(s)H(s). The roots of 1 + L(s) = 0 are the closed-loop poles. The reference and disturbance responses share them and so decay at the same rates, but they differ in their numerators, and so in their zeros, a difference that matters in both worked examples.

Feedback buys accuracy and disturbance rejection at three costs: a sensor, the sensor's noise, and the possibility of instability. Negative Feedback Theory develops the desensitivity argument, and Automatic Control Circuits builds such loops in hardware. The rest of this article assumes unity feedback unless it says otherwise.

Standard Test Inputs

Engineers compare loops by their responses to a few standard inputs, each applied at t = 0 to a system at rest.

The step is the workhorse. It is easy to produce with a switch, a square wave, or a load that turns on, and one trace shows both speed and damping, so the specifications that follow all refer to it. The ramp and the parabola test tracking, as when an antenna slews at constant angular velocity or a machine axis accelerates. Some texts define the parabola as t², whose transform is 2/s³; that choice doubles the corresponding error.

A test step must also be small enough to keep every part of the loop linear, as the section on measurement explains.

First-Order Response

A first-order system has a single pole, at s = −1/τ:

T(s) = K / (τs + 1)

where K is the DC gain and τ is the time constant. Its unit-step response,

y(t) = K(1 − e^−t/τ)

rises without overshoot, covering 63.2 percent of its change in one time constant, 86.5 percent in two, 95.0 percent in three, 98.2 percent in four, and 99.3 percent in five. Solving for the crossings gives exact specifications:

• Rise time, 10 to 90 percent: t_r = τ ln 9 ≈ 2.20τ.
• Settling time, 2 percent band: t_s = τ ln 50 ≈ 3.91τ, usually rounded to 4τ.
• Settling time, 5 percent band: t_s = τ ln 20 ≈ 3.00τ.
• Bandwidth: |T(jω)| falls by 3 dB at ω = 1/τ, so f_BW = 1/(2πτ) and t_rf_BW = ln 9/(2π) ≈ 0.35, the source of the familiar rule t_r ≈ 0.35/f_BW, which is exact only for a single pole.

Feedback around an integrator produces a first-order loop. A plant K₀/s under proportional gain K_P gives T(s) = K₀K_P/(s + K₀K_P), with τ = 1/(K₀K_P) and a DC gain of exactly 1. Raising the gain shortens the time constant in proportion; the linear model sets no limit, but the actuator does. Driven by a unit ramp, the loop's output is

y(t) = t − τ + τe^−t/τ

so it settles into a lag of exactly one time constant, a result the section on steady-state error generalizes. Because a first-order response cannot overshoot, it is a common design target; lambda tuning of process loops, for example, aims for a first-order response plus dead time.

The Second-Order Prototype

Most time-domain specifications refer to the standard second-order system,

T(s) = ω_n² / (s² + 2ζω_ns + ω_n²)

where ω_n is the undamped natural frequency in radians per second and ζ is the dimensionless damping ratio; the DC gain is 1. It is exactly the closed loop formed by unity feedback around

L(s) = ω_n² / [s(s + 2ζω_n)]

an integrator in series with one real pole. That is the loop of a DC motor positioned by proportional control when its armature inductance is negligible, and many higher-order loops behave approximately like it. Circuit texts write the same denominator as s² + 2αs + ω₀², with α = ζω₀.

For 0 < ζ < 1 the poles form a complex pair,

s = −ζω_n ± jω_n√(1 − ζ²) = −σ ± jω_d

where σ = ζω_n is the decay rate and ω_d = ω_n√(1 − ζ²) is the damped natural frequency. Each pole lies at distance ω_n from the origin, on a line that makes the angle θ = arccos ζ with the negative real axis. In the s-plane, rays from the origin therefore mark constant damping, circles about the origin constant natural frequency, and vertical and horizontal lines constant decay rate and constant ringing frequency.

The underdamped unit-step response is

y(t) = 1 − [e^−ζω_nt / √(1 − ζ²)] sin(ω_dt + θ)

It starts from zero with zero slope and rings at ω_d inside the envelope 1 ± e^−ζω_nt/√(1 − ζ²). Its slope, which is also the impulse response, is [ω_n/√(1 − ζ²)] e^−ζω_nt sin ω_dt.

Rise Time, Peak Time, Overshoot, and Settling Time

Four numbers summarize the transient part of a step response:

• Rise time, t_r: The 10 to 90 percent rise time is standard for overdamped responses and for instrument measurements. For underdamped responses, some control texts use the 0 to 100 percent rise time instead, the time at which the response first reaches its final value, because it has a closed form. At ζ = 0.5 the second is about 48 percent longer than the first, so a rise-time figure should name its definition.
• Peak time, t_p: The time of the first, and largest, peak of an underdamped response.
• Percent overshoot: 100 × (y_max − y_final)/y_final.
• Settling time, t_s: The time after which the response stays within a band around its final value, usually ±2 or ±5 percent of that value.

A fifth number, the steady-state error, has its own section below.

Specifications therefore translate into pole locations. A loop that may overshoot by no more than 10 percent and must settle within 2 percent in 0.2 s needs ζ ≥ 0.59 and ζω_n ≥ 4/0.2 = 20 s⁻¹. Its dominant poles must lie to the left of the vertical line through −20 s⁻¹ and within 54 degrees of the negative real axis. Because the settling estimate can err in either direction, leave margin and confirm the design by simulation.

Dominant Poles and the Effect of Zeros

Real loops have more than two poles, and many have zeros. By partial fractions, the step response is a sum of terms e^pt, one for each closed-loop pole p, weighted by residues that the zeros help set. Poles far to the left die out quickly, and a pole close to a zero carries a small residue. The response is therefore often shaped by the one real pole or complex pair nearest the imaginary axis: the dominant poles.

Steady-State Error and System Type

With unity feedback, the error E(s) = R(s) − Y(s) is

E(s) = R(s) / [1 + L(s)]

and the final-value theorem gives the error that remains:

e_ss = lim_s→0 sR(s) / [1 + L(s)]

The theorem applies only when e(t) settles, which requires every pole of sE(s) to lie in the open left half-plane. The closed loop must therefore be stable; applied to an unstable loop, the formula returns a finite number that means nothing. Laplace Transform states the conditions in full. Everything below assumes unity feedback and a stable closed loop.

The system type is the number of integrators, or poles at s = 0, in the loop transfer function: writing L(s) = L₀(s)/s^N, with L₀(0) finite and nonzero, the type is N. An integrator may be an integral term in the controller or part of the plant, since a motor's shaft angle integrates its speed and a tank's level integrates its net inflow. Three error constants summarize the low-frequency loop gain: the position constant K_p = lim_s→0 L(s), the velocity constant K_v = lim_s→0 sL(s), and the acceleration constant K_a = lim_s→0 s²L(s). The names come from servomechanisms but apply to any controlled quantity, and the lowercase subscripts distinguish these constants from the controller gains K_P, K_I, and K_D. Evaluating the limit for each input gives the table; for an input of amplitude A, multiply the error by A.

Each integrator removes the error for one more order of input. A type 0 loop leaves a step error, because some error must persist to hold the drive signal. Where the table shows unbounded error, sE(s) keeps a pole at the origin and the error grows steadily. Consider a position servo with L(s) = 50/[s(0.02s + 1)]. It is type 1 with K_v = 50 s⁻¹, so it lands exactly on a commanded position but trails a command moving at 2 rad/s by 2/50 = 0.04 rad; Servo Drive Systems treats this lag as following error. Its closed-loop denominator, s² + 50s + 2,500, gives ω_n = 50 rad/s and ζ = 0.5, so a position step overshoots by 16 percent and settles within 2 percent in about 4/25 = 0.16 s.

The error constants say nothing about the transient, and the two requirements pull against each other. Raising the gain raises K_p or K_v but usually lowers damping, and each added integrator contributes 90 degrees of phase lag, pushing the loop toward instability.

Disturbance Rejection and Sensitivity

A disturbance D(s) entering between controller and plant reaches the output through

Y(s)/D(s) = G(s) / [1 + C(s)G(s)]

With the reference at zero, the error is −Y(s), and for a step disturbance of size d₀ the final-value theorem gives

e_ss = −d₀ / [lim_s→0 1/G(s) + lim_s→0 C(s)]

The error vanishes only if the denominator grows without bound. An integrator in the controller, upstream of the disturbance, achieves that. An integrator in the plant, downstream of the disturbance, does not: 1/G(0) is then zero, and the error is −d₀/C(0). Split the servo's gain between a controller with K_P = 2.5 V/rad and a motor with K_m = 20 (rad/s)/V. The loop is type 1 for commands, yet a constant load torque equivalent to a 1 V drop in drive voltage holds the shaft 1/2.5 = 0.4 rad from its target. Integral action in the controller removes that error.

From Time-Domain Specifications to Phase Margin and Bandwidth

Designers often specify a loop in the time domain but design it in the frequency domain, where loop gain is easy to shape and to measure. The prototype supplies the translation. The relations below are exact for unity feedback around L(s) = ω_n²/[s(s + 2ζω_n)] and approximate for any loop dominated by one pair of closed-loop poles. Stability Analysis and Compensation defines phase and gain margin and reads them from Bode and Nyquist plots.

Setting |L(jω)| = 1 gives the gain crossover frequency and the phase margin:

ω_c = ω_n√[√(1 + 4ζ⁴) − 2ζ²]

phase margin = arctan(2ζω_n/ω_c)

Setting |T(jω)| = 1/√2 gives the closed-loop bandwidth. For ζ < 1/√2, the closed-loop magnitude also peaks, reaching M_r at the frequency ω_n√(1 − 2ζ²):

ω_BW = ω_n√[1 − 2ζ² + √(4ζ⁴ − 4ζ² + 2)]

M_r = 1 / [2ζ√(1 − ζ²)]

• Damping from phase margin: ζ ≈ PM/100, with the phase margin PM in degrees, holds within about 10 percent for phase margins from 40 to 65 degrees and within about 15 percent from 5 to 70 degrees. It fails above that range; a critically damped loop has a phase margin of 76 degrees, not 100. In prototype terms, 45 degrees of phase margin means ζ ≈ 0.42 and 23 percent overshoot, and 60 degrees means ζ ≈ 0.61 and 9 percent.
• Bandwidth from crossover: For 0.2 ≤ ζ ≤ 1, the closed-loop bandwidth lies between 1.3 and 1.6 times the crossover frequency, so the crossover, read directly from the loop gain, sets the speed.
• Rise time from bandwidth: Over the same range, f_BWt_r (10 to 90 percent) runs from 0.29 to 0.34, so t_r ≈ 0.35/f_BW overstates the rise time by less than 10 percent for ζ ≥ 0.4 and by about 20 percent at ζ = 0.2.
• Overshoot from resonance: A closed-loop peak of 1.2 dB goes with ζ = 0.5 and 16 percent overshoot, and a peak of 4.8 dB with ζ = 0.3 and 37 percent.

Extra poles, time delay, and zeros, including a PI controller's zero, alter all four relations. Treat them as starting points, and confirm the response by simulation or measurement.

How P, I, and D Terms Shape the Response

A PID controller in parallel form applies C(s) = K_P + K_I/s + K_Ds to the error. The PID Control Fundamentals section of Process Control Theory and Implementation covers controller forms, tuning, and anti-windup, and Automatic Control Circuits builds each term from op-amps. The question here is narrower: what each term does to the specifications. For a plant G(s) = K/[s(s + a)], such as a motor turning a load to a position, the answers are exact.

Measuring a Step Response

Worked Example: A Motor Speed Loop

A permanent-magnet DC motor drives a flywheel from a 24 V PWM amplifier that acts as a voltage source. The motor's electrical time constant is far shorter than its mechanical one, so speed follows voltage as a first-order system:

G(s) = Ω(s)/V(s) = K_m/(τ_ms + 1), with K_m = 20 (rad/s)/V and τ_m = 50 ms

An encoder measures speed without significant lag. The motor's torque constant is 0.05 N·m/A and its armature resistance 1 Ω, so a load torque of 0.05 N·m acts like a 1 V drop in the applied voltage and, uncorrected, would slow the motor by 20 rad/s. With a PI controller C(s) = K_P + K_I/s, the setpoint and load responses are

Ω(s)/R(s) = K_m(K_Ps + K_I) / [τ_ms² + (1 + K_mK_P)s + K_mK_I]

Ω(s)/D(s) = K_ms / [τ_ms² + (1 + K_mK_P)s + K_mK_I]

They share poles but differ in zeros: the setpoint path has a zero at s = −K_I/K_P, and the load path a zero at the origin.

1. Try proportional control. With K_I = 0 the loop stays first order, with time constant τ_m/(1 + K_PK_m) and step error 1/(1 + K_PK_m). K_P = 0.2 V/(rad/s) gives a loop gain of 4, a 10 ms time constant, and 2 percent settling in 39 ms, but the speed settles 20 percent short of the command and droops 4 rad/s under the load. K_P = 1 cuts the error to 4.8 percent, yet a 100 rad/s step would then demand 100 V at the first instant, more than four times what the amplifier can supply. The loop saturates, and the linear predictions no longer hold.
2. Place the poles. Matching the denominator to τ_m(s² + 2ζω_ns + ω_n²) gives K_I = ω_n²τ_m/K_m and K_P = (2ζω_nτ_m − 1)/K_m. For ζ = 0.7 and ω_n = 40 rad/s, K_I = 4.0 V/rad and K_P = 0.09 V/(rad/s).
3. Predict with the prototype. The formulas give 4.6 percent overshoot, a 110 ms peak time, a 53 ms rise time (10 to 90 percent), and a 2 percent settling time of about 4/(0.7 × 40) ≈ 143 ms.
4. Correct for the zero. The setpoint zero sits at −44 s⁻¹, only 1.6 times the poles' real part of 28 s⁻¹. Simulating the full transfer function gives 9.5 percent overshoot, a 33 ms rise time, a 73 ms peak time, and 2 percent settling in 128 ms: the zero doubles the overshoot and quickens the rise. For a 100 rad/s step, the amplifier output starts at 9 V and peaks at 9.3 V, inside its 24 V limit, so the linear model holds.
5. Check steady state. The loop is type 1, so a speed step leaves no error. With K_v = K_mK_I = 80 s⁻¹, the speed lags a constant acceleration of 200 rad/s² by 200/80 = 2.5 rad/s.
6. Check the load step. For the 1 V load step, the speed deviation in rad/s is [K_m/(τ_mω_d)] e^−ζω_nt sin ω_dt. It peaks where ω_dt = arccos ζ, a dip of 4.6 rad/s at 28 ms, and returns within 0.5 rad/s by 93 ms. No error remains, because the integrator sits upstream of the disturbance.
7. Weigh the alternatives. A setpoint prefilter 1/(1 + sK_P/K_I), or proportional action on the measurement instead of the error, removes the setpoint zero. Overshoot returns to 4.6 percent and the load response is unchanged, but the lag during constant acceleration grows from 2.5 to 7.0 rad/s. Setting K_I/K_P = 1/τ_m instead cancels the motor pole and makes the setpoint response first order: with a 5 ms closed-loop time constant, a small speed step settles within 2 percent in 20 ms. The canceled pole still belongs to the loop, however. After the load step, the speed takes 155 ms to return within 0.1 rad/s, against 19 ms for a design with ζ = 0.7 and ω_n = 200 rad/s, whose setpoint zero then needs a prefilter to avoid 18 percent overshoot.

Worked Example: A Regulator Load Step

A buck converter makes 3.3 V from 12 V with a 2.2 µH inductor and 100 µF of output capacitance, the effective value of its ceramic capacitors under DC bias, with 2 mΩ of ESR. It switches at 400 kHz under peak-current-mode control, and its voltage loop crosses over at 40 kHz, a tenth of the switching frequency, through a type II compensator whose zero sits at 4 kHz. The load current steps by 1 A in much less than a microsecond. Voltage Regulator Considerations describes the capacitor bank and the two mechanisms, loop bandwidth and inductor slew rate, that limit such a response.

1. Treat the load as a disturbance. The loop sees only the voltage error that the load current causes. The deviation equals the load step times the closed-loop output impedance, Z_cl(s) = Z_ol(s)/[1 + L(s)], which is the open-loop output impedance multiplied by the sensitivity function.
2. Estimate the dip. Well below crossover, loop gain holds the impedance down; well above it, the output capacitor alone supports the voltage. The closed-loop impedance therefore peaks near crossover at roughly the capacitor's impedance there. Robert Kollman of Texas Instruments, in Power Tip #10 (EDN, April 2009), estimates the deviation as the load step times that peak impedance: ΔV ≈ ΔI/(2πf_cC_out) = 1 A/(2π × 40 kHz × 100 µF) ≈ 40 mV, or 1.2 percent of 3.3 V. The ESR adds an immediate step of 1 A × 2 mΩ = 2 mV.
3. Test the estimate. A simple model treats the current-mode power stage as a current source feeding C_out, applies the type II compensator, and adds a first-order lag for the current loop and modulator. With the lag at 103 kHz, giving 66 degrees of phase margin, or at 55 kHz, giving 51 degrees, it predicts dips of 35 and 38 mV about 7 µs after the step. For phase margins from 40 to 85 degrees, the modeled dip stays between 83 and 98 percent of the estimate. The estimate ignores phase margin, and lower margins raise the peak.
4. Check the large-signal limit. The inductor current can rise at (V_in − V_out)/L ≈ 4 A per microsecond and fall at V_out/L ≈ 1.5 A per microsecond, so it follows the 1 A step within a microsecond, well inside the loop's time scale of 1/(2πf_c) ≈ 4 µs; the loop, not the inductor, limits this response. With a larger step or inductor, the charge the capacitor supplies while the current ramps sets a floor on the dip. For a step up, if the controller can apply the full input voltage across the inductor at once, the floor is LΔI²/[2C_out(V_in − V_out)], only 1.3 mV here.
5. Estimate the recovery. The compensator zero leaves a slow closed-loop pole just above the zero frequency, near 4.4 kHz in the model, with a time constant of about 36 µs. The modeled output returns within 4 mV of its setpoint after 80 to 90 µs and within 2 mV after about 110 µs. Moving the zero lower adds phase margin but lengthens this tail.
6. Read the ringing. If the dip rings, the ringing sits near the crossover frequency, and the decay of successive peaks gives the damping of the dominant closed-loop poles, from which ζ ≈ PM/100 gives a rough phase margin. A load step exercises the disturbance path rather than the setpoint path, so confirm a doubtful margin with a loop-gain measurement, as Stability Analysis and Compensation describes.

Summary

Time-domain specifications describe what a loop does after a change: how fast it responds, how far it overshoots, how soon it settles, and what error remains. The second-order prototype ties overshoot to ζ alone, peak time to ω_d, and settling time to ζω_n, turning each specification into a region of the s-plane. Those formulas are exact only for the prototype: the settling estimates can overstate the true value by 30 percent or more, extra poles and zeros shift every number, and a PI controller's zero can double the overshoot.

Steady-state accuracy comes from low-frequency loop gain: system type counts integrators, the error constants measure what remains, and disturbance rejection depends on where the integrators sit. Sensitivity sets the price, because a band in which feedback rejects disturbances also passes sensor noise, and sensitivity pushed down in one band rises in another. For loops near the prototype, ζ ≈ PM/100 and a bandwidth of 1.3 to 1.6 times crossover connect time-domain targets to frequency-domain design, and a small step test that keeps the loop linear checks the prediction against the hardware.

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